On Sat, Jan 29, 2022 at 01:42:37AM +0300, Alper Nebi Yasak wrote:
> The Rockchip RK3399 eMMC PHY has to be power-cycled while changing its
> clock speed to some higher speeds. This is dependent on the desired
> SDHCI clock speed, and it looks like the PHY should be powered off while
> setting the SDHCI clock in these cases.
>
> Commit ac804143cfd1 ("mmc: rockchip_sdhci: add phy and clock config for
> rk3399") attempts to do this in the set_ios_post() hook by setting the
> SDHCI clock once more while the PHY is turned off/on as necessary, as
> the SDHCI framework does not provide a way to override how it sets its
> clock. However, the commit breaks reinitializing the eMMC on a few
> boards including chromebook_kevin and reportedly ROCKPro64.
>
> This patch reworks the power cycling to utilize the SDHCI framework
> slightly better (using the set_control_reg() hook to power off the PHY
> and set_ios_post() hook to power it back on) which happens to fix the
> issue, at least on a chromebook_kevin.
>
> Signed-off-by: Alper Nebi Yasak <alpernebiya...@gmail.com>
> Reviewed-by: Simon Glass <s...@chromium.org>Applied to u-boot/master, thanks! -- Tom
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