[PATCH] crypto: aspeed: fix polling RSA status wrong issue

[Neal Liu]

Check interrupt status to see if RSA engine is completed. After completion
of the task, write-clear the status to finish operation.
Add missing register base for completion.

Signed-off-by: Neal Liu <neal_...@aspeedtech.com>
---
 drivers/crypto/aspeed/aspeed_acry.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/aspeed/aspeed_acry.c 
b/drivers/crypto/aspeed/aspeed_acry.c
index c28cdf374b..47a007f633 100644
--- a/drivers/crypto/aspeed/aspeed_acry.c
+++ b/drivers/crypto/aspeed/aspeed_acry.c
@@ -103,7 +103,7 @@ static int aspeed_acry_mod_exp(struct udevice *dev, const 
uint8_t *sig, uint32_t
        while (1) {
                reg = readl(acry->base + ACRY_RSA_INT_STS);
                if ((reg & ACRY_RSA_INT_STS_RSA_READY) && (reg & 
ACRY_RSA_INT_STS_RSA_CMPLT)) {
-                       writel(reg, ACRY_RSA_INT_STS);
+                       writel(reg, acry->base + ACRY_RSA_INT_STS);
                        break;
                }
                udelay(20);
-- 
2.25.1