On Tue, Nov 30, 2021 at 01:06:56AM +0100, Stefan Mätje wrote: > On AM4372 the SPI_GCLK input gets its clock from the PRCM module which > divides the PER_CLKOUTM2 frequency (192MHz) by a fixed factor of 4. > See AM437x Reference Manual in section 27 QSPI >> 27.2 Integration. > > The QSPI_FCLK therefore needs to take this factor into account and > becomes (192000000 / 4). > > Signed-off-by: Stefan Mätje <stefan.mae...@esd.eu>
Applied to u-boot/master, thanks! -- Tom
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