From: Ashok Reddy Soma <ashok.reddy.s...@xilinx.com> Timeout for checking mdio phy idle status is 20seconds. In case of errors this timeout will be too much. Reduce it to 100ms.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.s...@xilinx.com> Signed-off-by: Michal Simek <michal.si...@xilinx.com> --- drivers/net/zynq_gem.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index c309c3c95499..033021f1cbfc 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -110,6 +110,8 @@ #define ZYNQ_GEM_DCFG_DBG6_DMA_64B BIT(23) +#define MDIO_IDLE_TIMEOUT_MS 100 + /* Use MII register 1 (MII status register) to detect PHY */ #define PHY_DETECT_REG 1 @@ -225,7 +227,7 @@ static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, int err; err = wait_for_bit_le32(®s->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK, - true, 20000, false); + true, MDIO_IDLE_TIMEOUT_MS, false); if (err) return err; @@ -238,7 +240,7 @@ static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, writel(mgtcr, ®s->phymntnc); err = wait_for_bit_le32(®s->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK, - true, 20000, false); + true, MDIO_IDLE_TIMEOUT_MS, false); if (err) return err; -- 2.33.1