Dear Nishanth Menon, In message <1288054924-24989-1-git-send-email...@ti.com> you wrote: > Having a loop with a counter is no timing guarentee for timing > accuracy or compiler optimizations. For e.g. the same loop counter > which runs when the MPU is running at 600MHz will timeout in around > half the time when running at 1GHz. or the example where GCC 4.5 > compiles with different optimization compared to GCC 4.4. > use a udelay(10) to ensure we have a predictable delay. > use an emperical number - 100000 uSec ~= 1sec for a worst case timeout.
Hm... 100000 usec = 0.1 sec only... Guess you mean 100,000 x 10 usec = 1 sec ? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Anyone can count the seeds in an apple. No one can count the apples in a seed. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
