On Sun, 23 May 2021 01:17:29 +0200
Andreas Rehn <rehn.andrea...@gmail.com> wrote:
> align CLK_USB_PHY0 with tabs
>
> Signed-off-by: Andreas Rehn <rehn.andrea...@gmail.com>
Reviewed-by: Andre Przywara <andre.przyw...@arm.com>
Cheers,
Andre
P.S. Please send a whole v2 series next time, to make this easier to
sort out which patch still applies and which not.
> ---
> Changes in v2:
> - revert CLK_SPI0 extra tab
>
> drivers/clk/sunxi/clk_v3s.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
> index 55fc597043..bc6b7b4870 100644
> --- a/drivers/clk/sunxi/clk_v3s.c
> +++ b/drivers/clk/sunxi/clk_v3s.c
> @@ -29,7 +29,7 @@ static struct ccu_clk_gate v3s_gates[] = {
>
> [CLK_SPI0] = GATE(0x0a0, BIT(31)),
>
> - [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
> + [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
> };
>
> static struct ccu_reset v3s_resets[] = {
