On 05/05/2021 20:47, Ramon Fried wrote:
> On Wed, May 5, 2021 at 10:55 AM Neil Armstrong <narmstr...@baylibre.com>
> wrote:
>>
>> When the PHY interface is set as TXID & RXID, the delays should be taken
>> from DT,
>> but first they should not be hardcoded since the PHY driver will set them.
>>
>> Fixes: 798424e857 ("net: designware: add Amlogic Meson8b & later glue
>> driver")
>> Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
>> ---
>> drivers/net/dwmac_meson8b.c | 23 +++++++++++++++++++----
>> 1 file changed, 19 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/net/dwmac_meson8b.c b/drivers/net/dwmac_meson8b.c
>> index c0b6ef4994..40cd8370b0 100644
>> --- a/drivers/net/dwmac_meson8b.c
>> +++ b/drivers/net/dwmac_meson8b.c
>> @@ -59,8 +59,6 @@ static int dwmac_setup_axg(struct udevice *dev, struct
>> eth_pdata *edata)
>> switch (edata->phy_interface) {
>> case PHY_INTERFACE_MODE_RGMII:
>> case PHY_INTERFACE_MODE_RGMII_ID:
>> - case PHY_INTERFACE_MODE_RGMII_RXID:
>> - case PHY_INTERFACE_MODE_RGMII_TXID:
>> /* Set RGMII mode */
>> setbits_le32(plat->regs + ETH_REG_0,
>> AXG_ETH_REG_0_PHY_INTF_RGMII |
>>
>> AXG_ETH_REG_0_TX_PHASE(1) |
>> @@ -69,6 +67,15 @@ static int dwmac_setup_axg(struct udevice *dev, struct
>> eth_pdata *edata)
>> AXG_ETH_REG_0_CLK_EN);
>> break;
>>
>> + case PHY_INTERFACE_MODE_RGMII_RXID:
>> + case PHY_INTERFACE_MODE_RGMII_TXID:
>> + /* TOFIX: handle amlogic,tx-delay-ns & rx-internal-delay-ps
>> from DT */
>> + setbits_le32(plat->regs + ETH_REG_0,
>> AXG_ETH_REG_0_PHY_INTF_RGMII |
>> +
>> AXG_ETH_REG_0_TX_RATIO(4) |
>> +
>> AXG_ETH_REG_0_PHY_CLK_EN |
>> + AXG_ETH_REG_0_CLK_EN);
>> + break;
>> +
>> case PHY_INTERFACE_MODE_RMII:
>> /* Set RMII mode */
>> out_le32(plat->regs + ETH_REG_0, AXG_ETH_REG_0_PHY_INTF_RMII
>> |
>> @@ -90,8 +97,6 @@ static int dwmac_setup_gx(struct udevice *dev, struct
>> eth_pdata *edata)
>> switch (edata->phy_interface) {
>> case PHY_INTERFACE_MODE_RGMII:
>> case PHY_INTERFACE_MODE_RGMII_ID:
>> - case PHY_INTERFACE_MODE_RGMII_RXID:
>> - case PHY_INTERFACE_MODE_RGMII_TXID:
>> /* Set RGMII mode */
>> setbits_le32(plat->regs + ETH_REG_0, GX_ETH_REG_0_PHY_INTF |
>>
>> GX_ETH_REG_0_TX_PHASE(1) |
>> @@ -101,6 +106,16 @@ static int dwmac_setup_gx(struct udevice *dev, struct
>> eth_pdata *edata)
>>
>> break;
>>
>> + case PHY_INTERFACE_MODE_RGMII_RXID:
>> + case PHY_INTERFACE_MODE_RGMII_TXID:
>> + /* TOFIX: handle amlogic,tx-delay-ns & rx-internal-delay-ps
>> from DT */
>> + setbits_le32(plat->regs + ETH_REG_0, GX_ETH_REG_0_PHY_INTF |
>> +
>> GX_ETH_REG_0_TX_RATIO(4) |
>> + GX_ETH_REG_0_PHY_CLK_EN
>> |
>> + GX_ETH_REG_0_CLK_EN);
>> +
>> + break;
>> +
>> case PHY_INTERFACE_MODE_RMII:
>> /* Set RMII mode */
>> out_le32(plat->regs + ETH_REG_0,
>> GX_ETH_REG_0_INVERT_RMII_CLK |
>> --
>> 2.25.1
>>
> Reviewed-by: Ramon Fried <rfried....@gmail.com>
>
Thanks,
Applied to u-boot-amlogic,
Neil
