Add the Zynq Mxic picozed development board support.
Signed-off-by: Zhengxun Li <zhengxu...@mxic.com.tw>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/zynq-mxic-picozed.dts | 72 ++++++++++++++++++++++++++++++++++++++
2 files changed, 74 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/zynq-mxic-picozed.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1dd6c4b..b5addc4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -287,7 +287,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zturn.dtb \
zynq-zturn-v5.dtb \
zynq-zybo.dtb \
- zynq-zybo-z7.dtb
+ zynq-zybo-z7.dtb \
+ zynq-mxic-picozed.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += \
avnet-ultra96-rev1.dtb \
avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dtb \
diff --git a/arch/arm/dts/zynq-mxic-picozed.dts
b/arch/arm/dts/zynq-mxic-picozed.dts
new file mode 100644
index 0000000..1f24ca1
--- /dev/null
+++ b/arch/arm/dts/zynq-mxic-picozed.dts
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021 Macronix Inc.
+ *
+ * Author: Zhengxun Li <zhengxu...@mxic.com.tw>
+ */
+
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+/ {
+ model = "Zynq MXIC PicoZed Development Board";
+ compatible = "mxicy,zynq-mxic-picozed", "xlnx,zynq-7000";
+
+ aliases {
+ ethernet0 = &gem0;
+ serial0 = &uart1;
+ spi0 = &spi_controller;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x30000000>;
+ };
+
+ chosen {
+ bootargs = "";
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&amba {
+ clkwizard: clkwizard@43c20000 {
+ compatible = "xlnx,clk-wizard-5.1";
+ reg = <0x43c20000 0x10000>;
+ clocks = <&clkc 18>, <&clkc 18>;
+ clock-names = "aclk", "clk_in1";
+ #clock-cells = <1>;
+ clock-frequency = <133300000>;
+ };
+
+ spi_controller: spi@43c30000 {
+ compatible = "mxicy,mx25f0a-spi";
+ reg = <0x43c30000 0x10000>;
+ reg-names = "regs";
+ clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 18>;
+ clock-names = "send_clk", "send_dly_clk", "ps_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+ };
+};
+
+&clkc {
+ ps-clk-frequency = <33333333>;
+};
+
+&gem0 {
+ status = "okay";
+ phy-mode = "rgmii-id";
+};
+
+&uart1 {
+ status = "okay";
+};
--
1.9.1
