Hi,

On 4/7/21 11:05 AM, zhengxunli wrote:
> Add the Zynq Mxic picozed development board support.
> 
> Signed-off-by: zhengxunli <[email protected]>
> ---
>  arch/arm/dts/Makefile              |  3 +-
>  arch/arm/dts/zynq-mxic-picozed.dts | 66 
> ++++++++++++++++++++++++++++++++++++++
>  2 files changed, 68 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/zynq-mxic-picozed.dts
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 9a8de46..059bb3b 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -286,7 +286,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>       zynq-zturn.dtb \
>       zynq-zturn-v5.dtb \
>       zynq-zybo.dtb \
> -     zynq-zybo-z7.dtb
> +     zynq-zybo-z7.dtb \
> +     zynq-mxic-picozed.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += \
>       avnet-ultra96-rev1.dtb                  \
>       avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dtb        \
> diff --git a/arch/arm/dts/zynq-mxic-picozed.dts 
> b/arch/arm/dts/zynq-mxic-picozed.dts
> new file mode 100644
> index 0000000..d2ff358
> --- /dev/null
> +++ b/arch/arm/dts/zynq-mxic-picozed.dts
> @@ -0,0 +1,66 @@
> +/dts-v1/;
> +/include/ "zynq-7000.dtsi"
> +
> +/ {
> +     model = "Zynq MXIC PicoZed Development Board";
> +     compatible = "mxicy,zynq-mxic-picozed", "xlnx,zynq-7000";
> +
> +     aliases {
> +             ethernet0 = &gem0;
> +             serial0 = &uart1;
> +             spi0 = &spi_controller;
> +     };
> +
> +     memory@0 {
> +             device_type = "memory";
> +             reg = <0x0 0x30000000>;
> +     };
> +
> +     chosen {
> +             bootargs = "";
> +             stdout-path = "serial0:115200n8";
> +     };
> +};
> +
> +&amba {
> +     clkwizard: clkwizard@43c20000 {
> +             compatible = "xlnx,clk-wizard-5.1";
> +             reg = <0x43c20000 0x10000>;
> +             clocks = <&clkc 18>, <&clkc 18>;
> +             clock-names = "aclk", "clk_in1";
> +             #clock-cells = <1>;
> +             clock-frequency = <133300000>;
> +             xlnx,clk-wizard-num-outputs = <2>;
> +     };

This is definitely PL IP.

> +
> +     spi_controller: spi@43c30000 {
> +             compatible = "mxicy,mx25f0a-spi";


And I expect this is also PL based IP.
And we have agreement that for upstream project we won't be accepting
any description for PL.
But there is not a problem with accepting driver for clocking wizard or
this IP.

And picozed board is already supported in u-boot.

Thanks,
Michal

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