On 3/15/21 2:00 PM, Simon Glass wrote:
> Since the recent bug fix, it doesn't matter which GPIO phandle is used so
> long as the GPIO number is right. Still, we may as well use the correct
> one to avoid confusion.
>
> Signed-off-by: Simon Glass <s...@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.ch...@samsung.com>
Best Regards,
Jaehoon Chung
> ---
>
> arch/x86/dts/chromebook_coral.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/dts/chromebook_coral.dts
> b/arch/x86/dts/chromebook_coral.dts
> index 9f84480e68e..30058be1ea3 100644
> --- a/arch/x86/dts/chromebook_coral.dts
> +++ b/arch/x86/dts/chromebook_coral.dts
> @@ -572,7 +572,7 @@
> sdmmc: sdmmc@1b,0 {
> reg = <0x0000d800 0 0 0 0>;
> compatible = "intel,apl-sd";
> - cd-gpios = <&gpio_n GPIO_177 GPIO_ACTIVE_LOW>;
> + cd-gpios = <&gpio_sw GPIO_177 GPIO_ACTIVE_LOW>;
> acpi,name = "SDCD";
> };
>
>
