Hi Marek,

From: Marek Vasut <ma...@denx.de>
Sent: mardi 1 décembre 2020 11:29

The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter or 
without one on the SDMMC1 interface. Because the SDMMC1 interface is limited to 
50 MHz and hence SD high-speed anyway, disable the SD feedback clock to permit 
operation of the same U-Boot image on both SoM with and without voltage level 
shifter.

Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Patrice Chotard <patrice.chot...@st.com>
Cc: Patrick Delaunay <patrick.delau...@st.com>
---
  arch/arm/dts/stm32mp15xx-dhcom.dtsi | 1 -
  1 file changed, 1 deletion(-)

diff --git a/arch/arm/dts/stm32mp15xx-dhcom.dtsi 
b/arch/arm/dts/stm32mp15xx-dhcom.dtsi
index 9049245c5b..dafcce4323 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom.dtsi
@@ -333,7 +333,6 @@
        disable-wp;
        st,sig-dir;
        st,neg-edge;
-       st,use-ckin;
        bus-width = <4>;
        vmmc-supply = <&vdd_sd>;
        status = "okay";
--
2.29.2

Reviewed-by: Patrick Delaunay <patrick.delau...@foss.st.com>

Thanks

Patrick

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