clk_set_rate returns the new clock rate for the clock, not 0 in success.
Fix the error checks to reflect proper API usage.

Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
 drivers/ram/k3-j721e/k3-j721e-ddrss.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/ram/k3-j721e/k3-j721e-ddrss.c 
b/drivers/ram/k3-j721e/k3-j721e-ddrss.c
index d647a8a209..247b9d5f16 100644
--- a/drivers/ram/k3-j721e/k3-j721e-ddrss.c
+++ b/drivers/ram/k3-j721e/k3-j721e-ddrss.c
@@ -195,8 +195,10 @@ static int j721e_ddrss_ofdata_to_priv(struct udevice *dev)
 
        /* Put DDR pll in bypass mode */
        ret = clk_set_rate(&ddrss->ddr_clk, clk_get_rate(&ddrss->osc_clk));
-       if (ret)
-               dev_err(dev, "ddr clk bypass failed\n");
+       if (ret < 0)
+               dev_err(dev, "ddr clk bypass failed: %d\n", ret);
+       else
+               ret = 0;
 
        return ret;
 }
-- 
2.17.1

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Reply via email to