Hi Bin, On Wed, 21 Oct 2020 at 21:03, Simon Glass <s...@chromium.org> wrote: > > This series adds various minor features and tweaks to allow Coral to boot > into Chrome OS from U-Boot. > > It relies on three other series which have been recently sent: > > - smbios (u-boot-dm/smbios-working) > - bootm (u-boot-dm/bootm-working) > - misca (u-boot-dm/misca-working) > > This should provide a solid base for using ACPI on other Intel Apollo Lake > (APL) devices. > > Changes in v2: > - Rename update_fixed_mtrss() to update_fixed_mtrrs() > - Add comments to enable_pm_timer_emulation() and cpu_mca_configure() > - Convert tabs to spaces for consistency > - Use log_err() to report error > - Rename struct chromeos_acpi to struct chromeos_acpi_gnvs > - Fix comment style > - Define CONFIG_CHROMEOS_VBOOT in the Kconfig too > - Correct a bisect build error > - Drop patch "Store the FADT so we can avoid searching for it" > - Drop patch "Move ROM_TABLE_ADDR into the C file" > > Simon Glass (30): > Add an assembly guard around linux/bitops.h > x86: apl: Add core init for the SoC > x86: Add a layout for Chrome OS verified boot > x86: Add support for private files > x86: Allow writing tables to fail > x86: acpi: Store the ACPI context in global_data > x86: Don't bother clearing global NVS > x86: coral: Drop the duplicate PCIe settings > x86: Add SMBIOS info for Coral > x86: coral: Correct max98357 file > x86: Use if instead of #ifdef in write_tables() > x86: Allow putting some tables in the bloblist > x86: nhlt: Correct output of bytes and 16-bit data > x86: nhlt: Fix a few bugs in the table generation > x86: Show the interrupt pointer with 'irqinfo' > x86: sound: Correct error handling > acpi: Correct reset handling in acpi_device_add_power_res() > x86: acpi: Allow the SSDT to be empty > x86: acpi: Put the generated code first in DSDT > acpi: Don't reset the tables with every new generation > x86: Define the Chrome OS GNVS region > x86: Use CONFIG_CHROMEOS_VBOOT for verified boot > x86: Set up Chrome OS to boot into developer mode > x86: Boot coral into Chrome OS by default > x86: fsp: Convert fsp_dram to use log_debug() > x86: Silence some logging statements > x86: acpi: Include the TPMv1 table only if needed > x86: acpi: Don't show the UART address by default > x86: pinctrl: Silence the warning when a pin is not found > x86: fsp: Adjust calculations for MTRR range and DRAM top > > Kconfig | 17 ++++ > arch/x86/cpu/apollolake/acpi.c | 25 ++++-- > arch/x86/cpu/apollolake/cpu.c | 84 +++++++++++++++++ > arch/x86/cpu/apollolake/cpu_common.c | 25 ++++++ > arch/x86/cpu/apollolake/cpu_spl.c | 20 ----- > arch/x86/cpu/apollolake/fsp_s.c | 8 +- > arch/x86/cpu/cpu.c | 9 +- > arch/x86/cpu/i386/interrupt.c | 14 +-- > arch/x86/cpu/intel_common/acpi.c | 1 - > arch/x86/cpu/intel_common/cpu.c | 19 ++++ > arch/x86/cpu/intel_common/intel_opregion.c | 2 +- > arch/x86/cpu/intel_common/itss.c | 8 +- > arch/x86/dts/chromebook_coral.dts | 12 ++- > arch/x86/dts/chromebook_samus.dts | 2 +- > arch/x86/dts/u-boot.dtsi | 4 + > arch/x86/include/asm/acpi/vbnv_layout.h | 38 ++++++++ > arch/x86/include/asm/arch-apollolake/cpu.h | 14 +++ > arch/x86/include/asm/cpu_common.h | 9 ++ > arch/x86/include/asm/intel_gnvs.h | 54 ++++++++++- > arch/x86/include/asm/interrupt.h | 17 ++++ > arch/x86/include/asm/msr-index.h | 20 ++++- > arch/x86/include/asm/tables.h | 4 +- > arch/x86/lib/acpi_nhlt.c | 19 ++-- > arch/x86/lib/acpi_table.c | 78 ++++++++++------ > arch/x86/lib/fsp/fsp_dram.c | 35 +++++--- > arch/x86/lib/fsp/fsp_graphics.c | 2 +- > arch/x86/lib/fsp2/fsp_dram.c | 8 +- > arch/x86/lib/interrupts.c | 3 + > arch/x86/lib/tables.c | 85 +++++++++++++----- > arch/x86/lib/tpl.c | 2 +- > .../max98357-render-2ch-48khz-24b.dat | Bin 0 -> 116 bytes > configs/chromebook_coral_defconfig | 13 ++- > drivers/core/acpi.c | 10 ++- > drivers/pinctrl/intel/pinctrl.c | 2 +- > drivers/sound/da7219.c | 4 +- > drivers/sound/max98357a.c | 2 +- > include/acpi/acpi_table.h | 10 +++ > include/asm-generic/global_data.h | 5 ++ > include/configs/chromebook_coral.h | 9 +- > include/dm/acpi.h | 9 ++ > include/linux/bitops.h | 4 +- > lib/Kconfig | 9 ++ > lib/acpi/acpi_device.c | 2 +- > lib/acpi/acpi_table.c | 4 +- > test/dm/acpi.c | 4 + > 45 files changed, 585 insertions(+), 140 deletions(-) > create mode 100644 arch/x86/include/asm/acpi/vbnv_layout.h
Just checking on this series and a few others in your patchwork queue. Regards, SImon