Using PIC TFRR register for post word load/store for generic MPC85xx.
Signed-off-by: York Sun <york...@freescale.com>
---
arch/powerpc/cpu/mpc85xx/cpu.c | 19 +++++++++++++++++++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index fc5d951..bf3d899 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -286,6 +286,25 @@ void mpc85xx_reginfo(void)
print_lbc_regs();
}
+#ifdef CONFIG_POST
+
+__attribute__((weak))
+void post_word_store(ulong a)
+{
+ void *save_addr = (void *)
+ (CONFIG_SYS_MPC8xxx_PIC_ADDR + offsetof(ccsr_pic_t, tfrr));
+ out_be32(save_addr, a);
+}
+__attribute__((weak))
+ulong post_word_load(void)
+{
+ void *save_addr = (void *)
+ (CONFIG_SYS_MPC8xxx_PIC_ADDR + offsetof(ccsr_pic_t, tfrr));
+ return in_be32(save_addr);
+}
+
+#endif /* CONFIG_POST */
+
#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
/* Board-specific functions defined in each board's ddr.c */
--
1.7.0.4
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