The AXG pmx driver gpio request offset needs the pin base to have the
correct pin number.

Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
 drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c 
b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
index c6cb941d0a..cfe94cf9e1 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
@@ -165,7 +165,10 @@ const struct pinctrl_ops meson_axg_pinctrl_ops = {
 static int meson_axg_gpio_request(struct udevice *dev,
                                  unsigned int offset, const char *label)
 {
-       return meson_axg_pmx_update_function(dev->parent, offset, 0);
+       struct meson_pinctrl *priv = dev_get_priv(dev->parent);
+
+       return meson_axg_pmx_update_function(dev->parent,
+                                            offset + priv->data->pin_base, 0);
 }
 
 static const struct dm_gpio_ops meson_axg_gpio_ops = {
-- 
2.25.1

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