The R5 SPL on J7200 SoCs will be limited to booting just the
MCU R5FSS0 R5F core in LockStep-mode at present, so add the
two required environment variables 'addr_mcur5f0_0load' and
'name_mcur5f0_0fw' that are needed by the R5 SPL early-boot
logic. The firmware name used is also different from that on
J721E SoCs.

Signed-off-by: Suman Anna <s-a...@ti.com>
---
 include/configs/j721e_evm.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index dc06de234154..5e6e6f81694b 100644
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -82,11 +82,17 @@
        "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
 
 #ifdef CONFIG_SYS_K3_SPL_ATF
+#if defined(CONFIG_TARGET_J721E_R5_EVM)
 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC                             \
        "addr_mainr5f0_0load=0x88000000\0"                              \
        "name_mainr5f0_0fw=/lib/firmware/j7-main-r5f0_0-fw\0"           \
        "addr_mcur5f0_0load=0x89000000\0"                               \
        "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0"
+#elif defined(CONFIG_TARGET_J7200_R5_EVM)
+#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC                             \
+       "addr_mcur5f0_0load=0x89000000\0"                               \
+       "name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw\0"
+#endif /* CONFIG_TARGET_J721E_R5_EVM */
 #else
 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC ""
 #endif /* CONFIG_SYS_K3_SPL_ATF */
-- 
2.28.0

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