Hi,

Any comments on this patchset?

Best Regards
Qiang Zhao

> -----Original Message-----
> From: Qiang Zhao <qiang.z...@nxp.com>
> Sent: 2020年6月8日 11:28
> To: Pankaj Bansal <pankaj.ban...@nxp.com>
> Cc: u-boot@lists.denx.de; Qiang Zhao <qiang.z...@nxp.com>
> Subject: [PATCH 1/2] armv8: dts: fsl-lx2160a: add flash node under dspi to qds
> dts
> 
> From: Zhao Qiang <qiang.z...@nxp.com>
> 
> Add flash node under dspi into fsl-lx2160a-qds.dtsi
> 
> Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
> ---
>  arch/arm/dts/fsl-lx2160a-qds.dtsi | 99
> +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 99 insertions(+)
> 
> diff --git a/arch/arm/dts/fsl-lx2160a-qds.dtsi
> b/arch/arm/dts/fsl-lx2160a-qds.dtsi
> index 129cf82..96c9800 100644
> --- a/arch/arm/dts/fsl-lx2160a-qds.dtsi
> +++ b/arch/arm/dts/fsl-lx2160a-qds.dtsi
> @@ -20,6 +20,105 @@
>       phy-connection-type = "rgmii-id";
>  };
> 
> +&dspi0 {
> +     bus-num = <0>;
> +     status = "okay";
> +
> +     dflash0: n25q128a {
> +             #address-cells = <1>;
> +             #size-cells = <1>;
> +             compatible = "spi-flash";
> +             spi-max-frequency = <3000000>;
> +             spi-cpol;
> +             spi-cpha;
> +             reg = <0>;
> +     };
> +     dflash1: sst25wf040b {
> +             #address-cells = <1>;
> +             #size-cells = <1>;
> +             compatible = "spi-flash";
> +             spi-max-frequency = <3000000>;
> +             spi-cpol;
> +             spi-cpha;
> +             reg = <1>;
> +     };
> +     dflash2: en25s64 {
> +             #address-cells = <1>;
> +             #size-cells = <1>;
> +             compatible = "spi-flash";
> +             spi-max-frequency = <3000000>;
> +             spi-cpol;
> +             spi-cpha;
> +             reg = <2>;
> +     };
> +};
> +
> +&dspi1 {
> +     bus-num = <0>;
> +     status = "okay";
> +
> +     dflash3: n25q128a {
> +             #address-cells = <1>;
> +             #size-cells = <1>;
> +             compatible = "spi-flash";
> +             spi-max-frequency = <3000000>;
> +             spi-cpol;
> +             spi-cpha;
> +             reg = <0>;
> +     };
> +     dflash4: sst25wf040b {
> +             #address-cells = <1>;
> +             #size-cells = <1>;
> +             compatible = "spi-flash";
> +             spi-max-frequency = <3000000>;
> +             spi-cpol;
> +             spi-cpha;
> +             reg = <1>;
> +     };
> +     dflash5: en25s64 {
> +             #address-cells = <1>;
> +             #size-cells = <1>;
> +             compatible = "spi-flash";
> +             spi-max-frequency = <3000000>;
> +             spi-cpol;
> +             spi-cpha;
> +             reg = <2>;
> +     };
> +};
> +
> +&dspi2 {
> +     bus-num = <0>;
> +     status = "okay";
> +
> +     dflash6: n25q128a {
> +             #address-cells = <1>;
> +             #size-cells = <1>;
> +             compatible = "spi-flash";
> +             spi-max-frequency = <3000000>;
> +             spi-cpol;
> +             spi-cpha;
> +             reg = <0>;
> +     };
> +     dflash7: sst25wf040b {
> +             #address-cells = <1>;
> +             #size-cells = <1>;
> +             compatible = "spi-flash";
> +             spi-max-frequency = <3000000>;
> +             spi-cpol;
> +             spi-cpha;
> +             reg = <1>;
> +     };
> +     dflash8: en25s64 {
> +             #address-cells = <1>;
> +             #size-cells = <1>;
> +             compatible = "spi-flash";
> +             spi-max-frequency = <3000000>;
> +             spi-cpol;
> +             spi-cpha;
> +             reg = <2>;
> +     };
> +};
> +
>  &emdio1 {
>       status = "okay";
>  };
> --
> 2.7.4

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