Hi Marri,
On Thursday 02 September 2010 03:17:03 tma...@apm.com wrote:
> From: Tirumala Marri <tma...@apm.com>
>
> Add support code for bluestone board wth APM82XXX processor based.
> This patch includes early board init, misc init, configure EBC,
> initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.
Look quite good. Still a few comments remaining below though.
<snip>
> diff --git a/include/configs/bluestone.h b/include/configs/bluestone.h
> new file mode 100644
> index 0000000..0ddd6c2
> --- /dev/null
> +++ b/include/configs/bluestone.h
> @@ -0,0 +1,171 @@
> +/*
> + * bluestone.h - configuration for Blouestone (APM82XXX)
> + *
> + * Copyright (c) 2010, Applied Micro Circuits Corporation
> + * Author: Tirumala R Marri <tma...@apm.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/*
> + * High Level Configuration Options
> + */
> +#define CONFIG_APM82181 1 /* Specific APM82XXX */
> +#define CONFIG_APM82XXX 1 /* APM82XXX series */
> +#define CONFIG_HOSTNAME bluestone
> +
> +#define CONFIG_440 1
> +#define CONFIG_4xx 1 /* ... PPC4xx family */
> +
> +/*
> + * Include common defines/options for all AMCC eval boards
> + */
> +#include "amcc-common.h"
> +#define CONFIG_SYS_CLK_FREQ 50000000
> +
> +#define CONFIG_BOARD_TYPES 1 /* support board types */
> +#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
> +#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
> +
> +/*
> + * Base addresses -- Note these are effective addresses where the
> + * actual resources get mapped (not physical addresses)
> + */
> +/* EBC stuff */
> +/* later mapped to this addr */
> +#define CONFIG_SYS_FLASH_BASE 0xFFF00000
> +#define CONFIG_SYS_FLASH_SIZE (4 << 20) /* 1MB usable
*/
> +
> +/* EBC Boot Space: 0xFF000000 */
> +#define CONFIG_SYS_BOOT_BASE_ADDR 0xFF000000
Hmm. This is not used anywhere in this port. I just noticed that you don't
have a TLB entry for the boot-space (NOR?) in your init.S. Is this correct?
Please explain how this works.
> +#define CONFIG_SYS_OCM_BASE 0xE3000000 /* OCM: 32k */
> +#define CONFIG_SYS_SRAM_BASE 0xE8000000 /* SRAM: 256k */
> +#define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal peripherals */
> +#define CONFIG_SYS_AHB_BASE 0xE2000000 /* internal AHB
peripherals*/
> +
> +/*
> + * Initial RAM & stack pointer (placed in OCM)
> + */
> +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_BASE /* OCM */
> +#define CONFIG_SYS_INIT_RAM_END (4 << 10)
> +#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
> +#define CONFIG_SYS_GBL_DATA_OFFSET \
> + (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
> +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
> +
> +/*
> + * Environment
> + */
> +/*
> + * Define here the location of the environment variables (FLASH).
> + */
> +#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment
vars */
> +#define CONFIG_SYS_NOR_CS 0 /* NOR chip connected to CSx */
> +
> +/*
> + * FLASH related
> + */
> +#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
> +#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
> +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
> +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
> +/* max number of memory banks */
> +#define CONFIG_SYS_MAX_FLASH_BANKS 1
> +/* max number of sectors on one chip */
> +#define CONFIG_SYS_MAX_FLASH_SECT 80
> +/* Timeout for Flash Erase (in ms) */
> +#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
> +/* Timeout for Flash Write (in ms) */
> +#define CONFIG_SYS_FLASH_WRITE_TOUT 500
> +/* use buffered writes (20x faster) */
> +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
> +/* print 'E' for empty sector on flinfo */
> +#define CONFIG_SYS_FLASH_EMPTY_INFO
> +#ifdef CONFIG_ENV_IS_IN_FLASH
> +#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
> +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE -
CONFIG_ENV_SECT_SIZE)
> +#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment
Sector */
> +/* Address and size of Redundant Environment Sector */
> +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR -
CONFIG_ENV_SECT_SIZE)
> +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
> +#endif /* CONFIG_ENV_IS_IN_FLASH */
> +
> +/* NOR Flash */
> +#define CONFIG_SYS_EBC_PB0AP (EBC_BXAP_BME_DISABLED | \
> + EBC_BXAP_TWT_ENCODE(64) | \
> + EBC_BXAP_BCE_DISABLE | \
> + EBC_BXAP_BCT_2TRANS | \
> + EBC_BXAP_CSN_ENCODE(1) | \
> + EBC_BXAP_OEN_ENCODE(2) | \
> + EBC_BXAP_WBN_ENCODE(2) | \
> + EBC_BXAP_WBF_ENCODE(2) | \
> + EBC_BXAP_TH_ENCODE(7) | \
> + EBC_BXAP_SOR_DELAYED | \
> + EBC_BXAP_BEM_WRITEONLY | \
> + EBC_BXAP_PEN_DISABLED)
> +/* Peripheral Bank Configuration Register - EBC_BxCR */
> +#define CONFIG_SYS_EBC_PB0CR \
> + (EBC_BXCR_BAS_ENCODE(CONFIG_SYS_FLASH_BASE) | \
> + EBC_BXCR_BS_1MB | \
> + EBC_BXCR_BU_RW | \
> + EBC_BXCR_BW_8BIT)
Move this down to the EBC section of this file.
> +/* SDRAM */
> +#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
> +#define SPD_EEPROM_ADDRESS {0x53, 0x51} /* SPD i2c spd addresses */
> +#define CONFIG_PPC4xx_DDR_AUTOCALIBRATION /* IBM DDR autocalibration
> */ +#define CONFIG_AUTOCALIB "silent\0" /* default is non-verbose
> */ +#define CONFIG_DDR_ECC 1 /* with ECC support
*/
> +
> +/*
> + * I2C
> + */
> +#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
> +#define CONFIG_SYS_I2C_MULTI_EEPROMS
> +#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8 >> 1)
> +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
> +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
> +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 /* Data sheet
*/
> +
> +/* I2C bootstrap EEPROM */
> +#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR 0x52
> +#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET 0
> +#define CONFIG_4xx_CONFIG_BLOCKSIZE 16
> +
> +/*
> + * Ethernet
> + */
> +#define CONFIG_IBM_EMAC4_V4 1
> +#define CONFIG_EMAC_PHY_MODE EMAC_PHY_MODE_NONE_RGMII
> +#define CONFIG_HAS_ETH0
> +#define CONFIG_RTL8211CL_PHY
Not used, please remove.
> +/* PHY address, See schematics */
> +#define CONFIG_PHY_ADDR 0x1f
> +/* reset phy upon startup */
> +#define CONFIG_PHY_RESET 1
> +#define CONFIG_PHY_RESET_R
Not used, please remove.
> +/* Include GbE speed/duplex detection */
> +#define CONFIG_PHY_GIGE 1
> +#define CONFIG_PHY_DYNAMIC_ANEG 1
> +/*
> + * External Bus Controller (EBC) Setup
> + **/
> +#define CONFIG_SYS_EBC_CFG 0xB8400000 /* EBC0_CFG */
Move the other EBC register settings here please. And use macros to define
CONFIG_SYS_EBC_CFG instead of this hard-coded value (see icon.h for example).
Thanks.
Cheers,
Stefan
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de
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