> The iMX7D RM 9.2.4.9.3 Power removal flow Table 9-11. Re-enabling power > explicitly says both the DDR controller and the PHY must be reset in the > correct sequence. Currently the code only resets the controller. This > leads to a misbehavior where the system brings the DRAM up after reboot, > but the DRAM is unstable. Add the missing reset. > The easiest way to trigger this is by triggering WDT without having the > WDT assert WDOG_B signal, i.e. mw.w 0x30280000 0x25 . > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Fabio Estevam <feste...@gmail.com> > Cc: NXP i.MX U-Boot Team <uboot-...@nxp.com> > Cc: Peng Fan <peng....@nxp.com> > Cc: Stefano Babic <sba...@denx.de> Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =====================================================================
