On Fri, May 22, 2020 at 6:18 AM Alex Nemirovsky
<alex.nemirov...@cortina-access.com> wrote:
>
> Add SPI NOR support for Cortina Access
> Presidio Engineering Board
>
> Signed-off-by: Alex Nemirovsky <alex.nemirov...@cortina-access.com>
> CC: Jagan Teki <ja...@amarulasolutions.com>
> CC: Vignesh R <vigne...@ti.com>
> CC: Tom Rini <tr...@konsulko.com>
>
> ---
>
> Changes in v8: None
> Changes in v7: None
> Changes in v5:
> - NAND support removed from presidio-asic board DT.
>
> Changes in v3: None
>
> arch/arm/dts/ca-presidio-engboard.dts | 6 +--
> board/cortina/presidio-asic/presidio.c | 16 ++++++-
> configs/cortina_presidio-asic-spi-nand_defconfig | 48 +++++++++++++++++++
> configs/cortina_presidio-asic-spi-nor_defconfig | 59
> ++++++++++++++++++++++++
> 4 files changed, 124 insertions(+), 5 deletions(-)
> create mode 100644 configs/cortina_presidio-asic-spi-nand_defconfig
> create mode 100644 configs/cortina_presidio-asic-spi-nor_defconfig
>
> diff --git a/arch/arm/dts/ca-presidio-engboard.dts
> b/arch/arm/dts/ca-presidio-engboard.dts
> index c03dacc..34148b9 100644
> --- a/arch/arm/dts/ca-presidio-engboard.dts
> +++ b/arch/arm/dts/ca-presidio-engboard.dts
> @@ -55,15 +55,13 @@
> };
>
> sflash: sflash-controller@f4324000 {
> - #address-cells = <2>;
> - #size-cells = <1>;
> compatible = "cortina,ca-sflash";
> reg = <0x0 0xf4324000 0x50>;
> reg-names = "sflash-regs";
> flash@0 {
> compatible = "jedec,spi-nor";
> - spi-rx-bus-width = <1>;
> - spi-max-frequency = <108000000>;
> + spi-rx-bus-width = <4>;
> + spi-tx-bus-width = <4>;
Unrelated change, please prepare separate patch.
> };
> };
> };
> diff --git a/board/cortina/presidio-asic/presidio.c
> b/board/cortina/presidio-asic/presidio.c
> index 3c132f1..883bd2e 100644
> --- a/board/cortina/presidio-asic/presidio.c
> +++ b/board/cortina/presidio-asic/presidio.c
> @@ -16,7 +16,7 @@
> #include <asm/psci.h>
> #include <cpu_func.h>
> #include <asm/armv8/mmu.h>
> -
> +#include <dm/uclass.h>
> DECLARE_GLOBAL_DATA_PTR;
>
> #define CA_PERIPH_BASE 0xE0000000UL
> @@ -72,9 +72,23 @@ static noinline int invoke_psci_fn_smc(u64 function_id,
> u64 arg0, u64 arg1,
> return function_id;
> }
>
> +#ifdef CONFIG_CORTINA_SFLASH
> +static int init_sflash(void)
> +{
> + struct udevice *dev;
> +
> + uclass_first_device(UCLASS_SPI, &dev);
I was wondering why SPI here is probing separately, we have sf to
probe at run time?
