Hi Jagan, >-----Original Message----- >From: Jagan Teki <ja...@amarulasolutions.com> >Sent: 13 May 2020 12:21 >To: Pragnesh Patel <pragnesh.pa...@sifive.com> >Cc: U-Boot-Denx <u-boot@lists.denx.de>; Atish Patra ><atish.pa...@wdc.com>; Palmer Dabbelt <palmerdabb...@google.com>; Bin >Meng <bmeng...@gmail.com>; Paul Walmsley <paul.walms...@sifive.com>; >Anup Patel <anup.pa...@wdc.com>; Sagar Kadam ><sagar.ka...@sifive.com>; Rick Chen <r...@andestech.com>; Lukasz >Majewski <lu...@denx.de>; Anatolij Gustschin <ag...@denx.de>; Simon >Glass <s...@chromium.org> >Subject: Re: [PATCH v9 11/18] clk: sifive: fu540-prci: release ethernet clock >reset > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >On Wed, May 13, 2020 at 11:57 AM Pragnesh Patel ><pragnesh.pa...@sifive.com> wrote: >> >> Release ethernet clock reset > >Please add a detailed commit message of why the ethernet clock is resetting in >SPL code since ethernet won't need for SPL at all?
Once the ethernet clock has been initialized ( set_rate() and clk_enable() ), we need to take ethernet clock out of reset. This patch is necessary in this series otherwise U-Boot cannot use ethernet and not able To boot. This ethernet reset __prci_ethernet_release_reset() is not depend on SPL or U-Boot proper. Right now, U-Boot proper is using ethernet so this gets called only for U-Boot proper and if SPL wants to use ethernet then function helps to take clock out of reset. I will update the commit description in v10. > >Jagan.
