> Subject: RE: [PATCH 1/2] imx: imx8mp_evk: fix boot issue > > > Subject: Re: [PATCH 1/2] imx: imx8mp_evk: fix boot issue > > > > Hi Peng, > > > > On Mon, May 11, 2020 at 2:55 AM Peng Fan <peng....@nxp.com> wrote: > > > > > > The u-boot-spl.bin pad with ddr firmware conflicts with the > > > CONFIG_MALLOC_F_ADDR area, the ddr firmware will be overwritten by > > > malloc in SPL stage and cause ddr initialization not able to finish. > > > So update the related addresses to fix the issue. > > > > > > Reported-by: Fabio Estevam <feste...@gmail.com> > > > Signed-off-by: Peng Fan <peng....@nxp.com> > > > --- > > > include/configs/imx8mp_evk.h | 8 ++++---- > > > 1 file changed, 4 insertions(+), 4 deletions(-) > > > > > > diff --git a/include/configs/imx8mp_evk.h > > > b/include/configs/imx8mp_evk.h index 80e5738961..b90a4f6932 100644 > > > --- a/include/configs/imx8mp_evk.h > > > +++ b/include/configs/imx8mp_evk.h > > > @@ -23,15 +23,15 @@ > > > #ifdef CONFIG_SPL_BUILD > > > /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ > > > #define CONFIG_SPL_LDSCRIPT > > "arch/arm/cpu/armv8/u-boot-spl.lds" > > > -#define CONFIG_SPL_STACK 0x990000 > > > -#define CONFIG_SPL_BSS_START_ADDR 0x0095e000 > > > -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ > > > +#define CONFIG_SPL_STACK 0x98fc00 > > > > On imx6/imx7 we have this kind of SPL information placed in the SoC > > related header files: > > > > include/configs/imx6_spl.h > > include/configs/imx7_spl.h > > > > We should do the same here instead of repeating these SPL settings in > > every board header file. > > ok. Fix in next version.
After a thought, i.MX8MQ/MM/MN/MP have different OCRAM sizes, and ATF locates in different places. So I would keep current code as is. Thanks, Peng. > > Thanks, > Peng. > > > > > Thanks
