> -----Original Message-----
> From: Xiaowei Bao <xiaowei....@nxp.com>
> Sent: 2020年3月22日 19:13
> To: M.h. Lian <minghuan.l...@nxp.com>; Z.q. Hou
> <zhiqiang....@nxp.com>; Mingkai Hu <mingkai...@nxp.com>;
> bmeng...@gmail.com; yamada.masah...@socionext.com;
> u-boot@lists.denx.de
> Cc: Xiaowei Bao <xiaowei....@nxp.com>
> Subject: [PATCH 5/9] pci_ep: layerscape: Add the workaround for errata
> A-009460
>
> The VF_BARn_REG register's Prefetchable and Type bit fields are overwritten
> by a write to VF's BAR Mask register.
> workaround: Before writing to the VF_BARn_MASK_REG register, write 0b to
> the PCIE_MISC_CONTROL_1_OFF register.
>
> Signed-off-by: Xiaowei Bao <xiaowei....@nxp.com>
> ---
> drivers/pci/pcie_layerscape_ep.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/pci/pcie_layerscape_ep.c
> b/drivers/pci/pcie_layerscape_ep.c
> index bec374b..a2b18ad 100644
> --- a/drivers/pci/pcie_layerscape_ep.c
> +++ b/drivers/pci/pcie_layerscape_ep.c
> @@ -163,6 +163,15 @@ static void ls_pcie_setup_ep(struct ls_pcie_ep
> *pcie_ep)
> if (PCI_EXT_CAP_ID(sriov) == PCI_EXT_CAP_ID_SRIOV) {
> pcie_ep->sriov_flag = 1;
> for (pf = 0; pf < PCIE_PF_NUM; pf++) {
> + /*
> + * The VF_BARn_REG register's Prefetchable and Type bit
> + * fields are overwritten by a write to VF's BAR Mask
> + * register. Before writing to the VF_BARn_MASK_REG
> + * register, write 0b to the PCIE_MISC_CONTROL_1_OFF
> + * register.
> + */
> + writel(0, pcie->dbi + PCIE_MISC_CONTROL_1_OFF);
> +
> if (pcie_ep->cfg2_flag) {
> for (vf = 0; vf <= PCIE_VF_NUM; vf++) {
> ctrl_writel(pcie,
> --
> 2.9.5
Reviewed-by: Hou Zhiqiang <zhiqiang....@nxp.com>
