Hi Daniel,

On 21.04.20 13:28, Daniel Schwierzeck wrote:


Am 21.04.20 um 09:28 schrieb Stefan Roese:
From: Weijie Gao <weijie....@mediatek.com>

This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.

The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are
not enabled and the memory bootable u-boot (u-boot.img) is generated
automatically so there is not need to add a separate config for it.

A lzma compressed payload (u-boot-lzma.img) is also generated and it will
be combined with u-boot-spl.bin to form the unified ROM bootable binary
u-boot-mtmips.bin.

A spl loader is added to support uncompress the payload.

Reviewed-by: Stefan Roese <s...@denx.de>
Signed-off-by: Weijie Gao <weijie....@mediatek.com>
---
Changes since v3: generate output file using u-boot-with-spl.bin

  Makefile                                    |  6 +++
  arch/mips/Kconfig                           |  3 ++
  arch/mips/dts/mt7628-u-boot.dtsi            | 56 +++++++++++++++++++++
  arch/mips/dts/mt7628a.dtsi                  |  2 +-
  arch/mips/mach-mtmips/Kconfig               | 26 ++++++++++
  arch/mips/mach-mtmips/Makefile              |  1 +
  arch/mips/mach-mtmips/include/mach/serial.h | 13 +++++
  arch/mips/mach-mtmips/mt7628/Makefile       |  1 +
  arch/mips/mach-mtmips/mt7628/serial.c       | 34 +++++++++++++
  arch/mips/mach-mtmips/spl.c                 | 44 ++++++++++++++++
  10 files changed, 185 insertions(+), 1 deletion(-)
  create mode 100644 arch/mips/dts/mt7628-u-boot.dtsi
  create mode 100644 arch/mips/mach-mtmips/include/mach/serial.h
  create mode 100644 arch/mips/mach-mtmips/mt7628/serial.c
  create mode 100644 arch/mips/mach-mtmips/spl.c

diff --git a/Makefile b/Makefile
index ffc1e28bd0..1e619bfc8b 100644
--- a/Makefile
+++ b/Makefile
@@ -938,6 +938,12 @@ endif
ALL-$(CONFIG_ARCH_MEDIATEK) += u-boot-mtk.bin +ifeq ($(CONFIG_SPL),y)
+ALL-$(CONFIG_ARCH_MTMIPS) += u-boot-with-spl.bin
+else
+ALL-$(CONFIG_ARCH_MTMIPS) += u-boot.bin
+endif
+
  # Add optional build target if defined in board/cpu/soc headers
  ifneq ($(CONFIG_BUILD_TARGET),)
  ALL-y += $(CONFIG_BUILD_TARGET:"%"=%)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7b9d0072eb..4c1eea1ccc 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -98,6 +98,9 @@ config ARCH_MTMIPS
        select SUPPORTS_CPU_MIPS32_R2
        select SUPPORTS_LITTLE_ENDIAN
        select SYSRESET
+       select SUPPORT_SPL
+       select SPL_LZMA
+       select BINMAN
config ARCH_JZ47XX
        bool "Support Ingenic JZ47xx"
diff --git a/arch/mips/dts/mt7628-u-boot.dtsi b/arch/mips/dts/mt7628-u-boot.dtsi
new file mode 100644
index 0000000000..9149187762
--- /dev/null
+++ b/arch/mips/dts/mt7628-u-boot.dtsi
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao <weijie....@mediatek.com>
+ */
+
+/ {
+       binman {
+               filename = "u-boot-mips.bin";
+               pad-byte = <0xff>;
+
+#ifdef CONFIG_SPL
+               u-boot-spl {
+               };
+
+               u-boot-lzma-img {
+               };
+#else
+               u-boot {
+               };
+#endif
+       };
+};
+
+&palmbus {
+       u-boot,dm-pre-reloc;
+};
+
+&reboot {
+       u-boot,dm-pre-reloc;
+};
+
+&clkctrl {
+       u-boot,dm-pre-reloc;
+};
+
+&rstctrl {
+       u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+       u-boot,dm-pre-reloc;
+};
+
+&uart0 {
+       u-boot,dm-pre-reloc;
+};
+
+&uart1 {
+       u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+       u-boot,dm-pre-reloc;
+};
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index 2200135a77..6baa63add3 100644
--- a/arch/mips/dts/mt7628a.dtsi
+++ b/arch/mips/dts/mt7628a.dtsi
@@ -33,7 +33,7 @@
                #clock-cells = <0>;
        };
- palmbus@10000000 {
+       palmbus: palmbus@10000000 {
                compatible = "palmbus", "simple-bus";
                reg = <0x10000000 0x200000>;
                ranges = <0x0 0x10000000 0x1FFFFF>;
diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index 3f25de8b85..81cec53e72 100644
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -20,8 +20,18 @@ config SYS_ICACHE_LINE_SIZE
        default 32
config SYS_TEXT_BASE
+       default 0x9c000000 if !SPL
+       default 0x80200000 if SPL
+
+config SPL_TEXT_BASE
        default 0x9c000000
+config SPL_LOADER_SUPPORT
+       default y

on my request this was introduced as generic MIPS symbol with patch
13/26. So maybe it's a left-over and should be removed. Either "config
ARCH_MTMIPS" or "config SOC_MT7628" should select this symbol.

Thanks for spotting. Would it be okay to fix this up with an incremental
patch once this series is in mainline, to not "pollute" the list more?
If no other changes are required of course.

Thanks,
Stefan

Reply via email to