Hi Jagan, On 30/03/20 09:15PM, Pratyush Yadav wrote: > Hi, > > This series adds support for octal DTR flashes in the spi-nor framework, > and then adds hooks for the Cypress Semper flash which is an xSPI > compliant Octal DTR flash. > > The Cadence QSPI controller driver is also updated to run in Octal DTR > mode. > > Tested on TI J721e EVM with 1-bit ECC on the Cypress flash on top of > u-boot-ti/next. > > This series depends on [0]. > > [0] cf. <20200224071051.19331-1-p.ya...@ti.com> > [0] https://lists.denx.de/pipermail/u-boot/2020-February/401192.html > > Changes in v3: > - Read 2 bytes in Octal DTR mode when reading SR and FSR to avoid > tripping up controllers. > - Use op->data.nbytes as a measure of whether the data phase exists or > not. This fixes data buswidth not being updadted for SR and FSR reads > because they keep data buffer as NULL when calling spi_nor_setup_op(). > - Add support for Micron mt35xu512aba to run in Octal DTR mode.
Any comments on the series? If not, please pull it in. -- Regards, Pratyush Yadav Texas Instruments India
