Hello Bin,
> -----Original Message-----
> From: Bin Meng <bmeng...@gmail.com>
> Sent: Tuesday, February 4, 2020 5:43 PM
> To: Sagar Kadam <sagar.ka...@sifive.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Rick Chen
> <r...@andestech.com>; Paul Walmsley ( Sifive) <paul.walms...@sifive.com>;
> Jagan Teki <ja...@amarulasolutions.com>; Anup Patel
> <anup.pa...@wdc.com>
> Subject: Re: [U-Boot Patch v2 1/4] fu540: dtsi: spi: add num-cs info to device
> tree
>
> Hi Sagar,
>
> On Wed, Jan 29, 2020 at 2:02 AM Sagar Shrikant Kadam
> <sagar.ka...@sifive.com> wrote:
> >
> > Add the number of chip select information to spi nodes which can be
> > used by spi-uclass for error handling if invalid cs number passed from
> > command.
> >
> > Signed-off-by: Sagar Shrikant Kadam <sagar.ka...@sifive.com>
> > ---
> > arch/riscv/dts/fu540-c000.dtsi | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/arch/riscv/dts/fu540-c000.dtsi
> > b/arch/riscv/dts/fu540-c000.dtsi index afa43c7..9c6ab21 100644
> > --- a/arch/riscv/dts/fu540-c000.dtsi
> > +++ b/arch/riscv/dts/fu540-c000.dtsi
> > @@ -191,6 +191,7 @@
> > clocks = <&prci PRCI_CLK_TLCLK>;
> > #address-cells = <1>;
> > #size-cells = <0>;
> > + num-cs = <1>;
>
> Why is this necessary? I can't find the codes that handle the num-cs
> property.
The code handling num-cs is a part of patch 2. I intended to keep it separate
thinking better to isolate dt and c files patches. Please let me know if I need
to keep it together.
> In the SiFive SPI driver, num_cs is determined from register
> SIFIVE_SPI_REG_CSDEF.
>
The SiFive SPI driver does read the num_cs defined in the register you
mentioned.
but it's hard defined with cs_width, eg: QSPI0 = 1, QSPI1 = 4, QSPI2 = 1.
I have added the option after sifive_spi_init_hw to read from device tree as
well
so that if the user want's to change the chip select's (less than that defined
in
SIFIVE_SPI_REG_CSDEF) then it can be done in hifive-unleashed-a00.dtsi
Please let me know your thoughts over here.
BR,
Sagar
> > status = "disabled";
> > };
> > qspi1: spi@10041000 {
> > @@ -202,6 +203,7 @@
> > clocks = <&prci PRCI_CLK_TLCLK>;
> > #address-cells = <1>;
> > #size-cells = <0>;
> > + num-cs = <1>;
> > status = "disabled";
> > };
> > qspi2: spi@10050000 {
> > @@ -212,6 +214,7 @@
> > clocks = <&prci PRCI_CLK_TLCLK>;
> > #address-cells = <1>;
> > #size-cells = <0>;
> > + num-cs = <1>;
> > status = "disabled";
> > };
> > eth0: ethernet@10090000 {
> > --
>
> Regards,
> Bin
