[PATCH v3 08/23] i2c: designware_i2c: Read device-tree properties

[Simon Glass]

The i2c controller defines a few timing properties. Read these in and
store them for use by the driver.

Signed-off-by: Simon Glass <s...@chromium.org>
Reviewed-by: Heiko Schocher <h...@denx.de>
---

Changes in v3: None
Changes in v2: None

 drivers/i2c/designware_i2c.c     |  8 ++++++--
 drivers/i2c/designware_i2c.h     | 15 +++++++++++++++
 drivers/i2c/designware_i2c_pci.c |  2 +-
 3 files changed, 22 insertions(+), 3 deletions(-)

diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index 0a1df8015f..34b6816545 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -535,11 +535,15 @@ static int designware_i2c_probe_chip(struct udevice *bus, 
uint chip_addr,
        return ret;
 }
 
-static int designware_i2c_ofdata_to_platdata(struct udevice *bus)
+int designware_i2c_ofdata_to_platdata(struct udevice *bus)
 {
        struct dw_i2c *priv = dev_get_priv(bus);
 
-       priv->regs = (struct i2c_regs *)devfdt_get_addr_ptr(bus);
+       if (!priv->regs)
+               priv->regs = (struct i2c_regs *)devfdt_get_addr_ptr(bus);
+       dev_read_u32(bus, "i2c-scl-rising-time-ns", &priv->scl_rise_time_ns);
+       dev_read_u32(bus, "i2c-scl-falling-time-ns", &priv->scl_fall_time_ns);
+       dev_read_u32(bus, "i2c-sda-hold-time-ns", &priv->sda_hold_time_ns);
 
        return 0;
 }
diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h
index 5b477830d4..f32dc0f854 100644
--- a/drivers/i2c/designware_i2c.h
+++ b/drivers/i2c/designware_i2c.h
@@ -167,10 +167,24 @@ struct dw_scl_sda_cfg {
        u32 sda_hold;
 };
 
+/**
+ * struct dw_i2c - private information for the bus
+ *
+ * @regs: Registers pointer
+ * @scl_sda_cfg: Deprecated information for x86 (should move to device tree)
+ * @resets: Resets for the I2C controller
+ * @scl_rise_time_ns: Configured SCL rise time in nanoseconds
+ * @scl_fall_time_ns: Configured SCL fall time in nanoseconds
+ * @sda_hold_time_ns: Configured SDA hold time in nanoseconds
+ * @clk: Clock input to the I2C controller
+ */
 struct dw_i2c {
        struct i2c_regs *regs;
        struct dw_scl_sda_cfg *scl_sda_cfg;
        struct reset_ctl_bulk resets;
+       u32 scl_rise_time_ns;
+       u32 scl_fall_time_ns;
+       u32 sda_hold_time_ns;
 #if CONFIG_IS_ENABLED(CLK)
        struct clk clk;
 #endif
@@ -180,5 +194,6 @@ extern const struct dm_i2c_ops designware_i2c_ops;
 
 int designware_i2c_probe(struct udevice *bus);
 int designware_i2c_remove(struct udevice *dev);
+int designware_i2c_ofdata_to_platdata(struct udevice *bus);
 
 #endif /* __DW_I2C_H_ */
diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c
index 7f0625df66..2b974a07c3 100644
--- a/drivers/i2c/designware_i2c_pci.c
+++ b/drivers/i2c/designware_i2c_pci.c
@@ -63,7 +63,7 @@ static int designware_i2c_pci_ofdata_to_platdata(struct 
udevice *dev)
                /* Use BayTrail specific timing values */
                priv->scl_sda_cfg = &byt_config;
 
-       return 0;
+       return designware_i2c_ofdata_to_platdata(dev);
 }
 
 static int designware_i2c_pci_probe(struct udevice *dev)
-- 
2.25.0.341.g760bfbb309-goog