Hi Marek,
> From: Christophe ROULLIER <christophe.roull...@st.com>
> Sent: lundi 13 janvier 2020 17:15
>
>
> On 1/13/20 2:33 PM, Marek Vasut wrote:
> > On 1/13/20 2:26 PM, Patrick DELAUNAY wrote:
> >> Hi Marek,
> > Hi,
> >
> >> + Christophe (Maintainer in kernel)
> >>
> >>> From: Marek Vasut <ma...@denx.de>
> >>> Sent: vendredi 10 janvier 2020 01:29
> >>>
> >>> Add missing 'eth-ck' clock to the ethernet node. These clock are
> >>> used to generate external clock signal for the PHY in case
> >>> 'st,eth_ref_clk_sel'
> >>> is specified.
> >>>
> >>> Signed-off-by: Marek Vasut <ma...@denx.de>
> >>> Cc: Patrick Delaunay <patrick.delau...@st.com>
> >>> Cc: Patrice Chotard <patrice.chot...@st.com>
> >>> ---
> >>> arch/arm/dts/stm32mp157c.dtsi | 2 ++
> >>> 1 file changed, 2 insertions(+)
> >>>
> >>> diff --git a/arch/arm/dts/stm32mp157c.dtsi
> >>> b/arch/arm/dts/stm32mp157c.dtsi index
> >>> 6c670cf9a3..41aea75213 100644
> >>> --- a/arch/arm/dts/stm32mp157c.dtsi
> >>> +++ b/arch/arm/dts/stm32mp157c.dtsi
> >>> @@ -1404,11 +1404,13 @@
> >>> clock-names = "stmmaceth",
> >>> "mac-clk-tx",
> >>> "mac-clk-rx",
> >>> + "eth-ck",
> >>> "ethstp",
> >>> "syscfg-clk";
> >>> clocks = <&rcc ETHMAC>,
> >>> <&rcc ETHTX>,
> >>> <&rcc ETHRX>,
> >>> + <&rcc ETHCK_K>,
> >>> <&rcc ETHSTP>,
> >>> <&rcc SYSCFG>;
> >>> st,syscon = <&syscfg 0x4>;
> >> This clock is optional, not needed by default for STM32MP15x:
> >> this clock is used only for a specific case: Phy without quartz, for all
> >> the other
> case we don't need to switch on this clock.
> > That's the usecase here.
> >
> >> Normally if it is the case, it should be done in board part, not in SOC
> >> device
> tree (is is the strategy chosen by kernel).
> >> Moreover stm32mp157c.dtsi is just a copy of the kernel one, so this patch
> >> also
> need to be accepted by Kernel Maintainers.
> >>
> >> NB: if you are in the Phy without crytal 50MHz (rmii +
> >> "st,eth_ref_clk_sel" +
> "eth-ck"),
> >> You should have also the associated pin in the device tree of the
> >> board :
> >>
> >> + <STM32_PINMUX('G', 8, AF2)>, /* ETH_RMII_ETHCK */
> > My PHY is _NOT_ connected to this pin, the output clock of the SoC are PA1.
> >
> >> Christophe you can complete my answer if it is not enough clear.
> > I would expect that you should describe _all_ the clock which are
> > routed into the ethernet IP in the DT and if the driver doesn't need
> > some of those clock, the driver should just not enable such clock.
>
> Hi Marek,
>
> You are right, we will add by default all clocks used by stm32mp157, and
> modify
> driver to decide if we need to enable it or not.
>
> So ACK to add ETHCK_K in stm32mp157c.dtsi
Christophe: thanks for ACK,
Reviewed-by: Patrick Delaunay <patrick.delau...@st.com>
And I add the patch in U-Boot device tree by advance
(the only possible impact is to switch on a not used clock).
Applied to u-boot-stm32/master, thanks!
Regards
Patrick
