On 25.11.19 11:30, Baruch Siach wrote:
Enabled both DDR clock signals to support Clearfog variants (currently,
Clearfog GTR) that need both clocks.

Signed-off-by: Baruch Siach <bar...@tkos.co.il>
---
  board/solidrun/clearfog/clearfog.c | 5 ++++-
  1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/board/solidrun/clearfog/clearfog.c 
b/board/solidrun/clearfog/clearfog.c
index 03724fee10c1..8b6381194688 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -68,7 +68,10 @@ static struct mv_ddr_topology_map board_topology_map = {
        BUS_MASK_32BIT,                 /* Busses mask */
        MV_DDR_CFG_DEFAULT,             /* ddr configuration data source */
        { {0} },                        /* raw spd data */
-       {0}                             /* timing parameters */
+       {0},                            /* timing parameters */
+       { {0} },                        /* electrical configuration */
+       {0,},                           /* electrical parameters */
+       0x3,                            /* clock enable mask */
  };
struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)


Reviewed-by: Stefan Roese <s...@denx.de>

Thanks,
Stefan

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