This patch fix clock-rate overflow problem in mediatek
clock driver common part.

Signed-off-by: Sam Shih <sam.s...@mediatek.com>
Reviewed-by: Ryder Lee <ryder....@mediatek.com>
---
 drivers/clk/mediatek/clk-mtk.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 6c6b500d9b..9c30be994e 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -39,7 +39,7 @@
  * this function is recursively called to find the parent to calculate
  * the accurate frequency.
  */
-static int mtk_clk_find_parent_rate(struct clk *clk, int id,
+static ulong mtk_clk_find_parent_rate(struct clk *clk, int id,
                                    const struct driver *drv)
 {
        struct clk parent = { .id = id, };
@@ -265,7 +265,7 @@ static ulong mtk_factor_recalc_rate(const struct 
mtk_fixed_factor *fdiv,
        return rate;
 }
 
-static int mtk_topckgen_get_factor_rate(struct clk *clk, u32 off)
+static ulong mtk_topckgen_get_factor_rate(struct clk *clk, u32 off)
 {
        struct mtk_clk_priv *priv = dev_get_priv(clk->dev);
        const struct mtk_fixed_factor *fdiv = &priv->tree->fdivs[off];
@@ -287,7 +287,7 @@ static int mtk_topckgen_get_factor_rate(struct clk *clk, 
u32 off)
        return mtk_factor_recalc_rate(fdiv, rate);
 }
 
-static int mtk_topckgen_get_mux_rate(struct clk *clk, u32 off)
+static ulong mtk_topckgen_get_mux_rate(struct clk *clk, u32 off)
 {
        struct mtk_clk_priv *priv = dev_get_priv(clk->dev);
        const struct mtk_composite *mux = &priv->tree->muxes[off];
-- 
2.17.1

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