On Sat, Dec 7, 2019 at 12:46 PM Simon Glass <s...@chromium.org> wrote: > > Most x86 CPUs use a mechanism where the SPI flash is mapped into the very > top of 32-bit address space, so that it can be executed in place and read > simply by copying from memory. For an 8MB ROM the mapping starts at > 0xff800000. > > However some recent Intel CPUs do not use a simple 1:1 memory map. Instead > the map starts at a different address and not all of the SPI flash is > accessible through the map. This 'Fast SPI' feature requires that U-Boot > check the location of the map. It is also possible (optionally) to read > from the SPI flash using a driver. > > Add support for booting from Fast SPI. The memory-mapped version is used > by both TPL and SPL on Apollo Lake. > > In respect of a SPI flash driver, the actual SPI driver is ich.c - this > just adds a few helper functions and definitions. > > This is used by Apollo Lake. > > Signed-off-by: Simon Glass <s...@chromium.org> > Reviewed-by: Bin Meng <bmeng...@gmail.com> > --- > > Changes in v6: None > Changes in v5: None > Changes in v4: None > Changes in v3: > - Add support for of-platdata for TPL > - Add the missing header file > - Change Fast-SPI driver into a helper file used by ICH SPI > - Don't include write() and erase() in TPL > - Drop 'a4' comment for register offset > - Merge in patch "x86: Add support for booting from Fast SPI" > - Reorder file so that write() and erase() are together > - Use pci_get_devfn() > > Changes in v2: None > > arch/x86/cpu/intel_common/Makefile | 1 + > arch/x86/cpu/intel_common/fast_spi.c | 73 ++++++++++++++++++++++++++++ > arch/x86/include/asm/fast_spi.h | 68 ++++++++++++++++++++++++++ > arch/x86/include/asm/spl.h | 1 + > 4 files changed, 143 insertions(+) > create mode 100644 arch/x86/cpu/intel_common/fast_spi.c > create mode 100644 arch/x86/include/asm/fast_spi.h >
applied to u-boot-x86/next, thanks!
