On Monday 19 July 2010 11:04:34 Fabio Giovagnini wrote:
> I Stefan. I did teh following upgrade of the fileyou suggestied to me.
>
> #define SST39VF6402B 0x236c
> ...
> #ifdef CONFIG_SYS_FLASH_LEGACY_4Mx16
> {
> .mfr_id = (u16)SST_MANUFACT,
> .dev_id = SST39VF6402B,
> .name = "SST 39VF6402B",
> .uaddr = {
> [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
> },
> .DevSize = SIZE_4MiB,
> .CmdSet = CFI_CMDSET_AMD_LEGACY,
> .NumEraseRegions= 1,
> .regions = {
> ERASEINFO(0x10000,128),
> }
> },
> #endif
>
> The flash works, but not properly.
What's exactly not working?
> My conention is A1 mcp Bus cocceted to A0 of flash chip to have 16 bit
> width for data bus. The flash datasheet tells the flash os organized in
> 128 32kword of esare sectors. So I think my setting is not correct. Is it?
Could be. IIRC, then the SST parts have 2 different erase regions, the
"normal" ones and the smaller ones (4k???). Not sure which one is used by this
command set. I suggest you investigate here further.
Cheers,
Stefan
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