>-----Original Message-----
>From: Yinbo Zhu <yinbo....@nxp.com>
>Sent: Tuesday, October 15, 2019 2:51 PM
>To: Wolfgang Denk <w...@denx.de>; Priyanka Jain <priyanka.j...@nxp.com>;
>Shengzhou Liu <shengzhou....@nxp.com>; u-boot@lists.denx.de
>Cc: Yinbo Zhu <yinbo....@nxp.com>; Xiaobo Xie <xiaobo....@nxp.com>;
>Jiafei Pan <jiafei....@nxp.com>; Prabhakar X
><prabhakar.kushw...@nxp.com>; Bin Meng <bmeng...@gmail.com>; Simon
>Goldschmidt <simon.k.r.goldschm...@gmail.com>; Adam Ford
><aford...@gmail.com>; Patrick Delaunay <patrick.delau...@st.com>; Jeremy
>Gebben <jgeb...@sweptlaser.com>; Joe Hershberger
><joe.hershber...@ni.com>; Y.b. Lu <yangbo...@nxp.com>
>Subject: [PATCH v3 01/20] arch: powerpc: add eSDHC node to p1020 dts
>
>Add eSDHC node to p1020 dts
>
>Signed-off-by: Yinbo Zhu <yinbo....@nxp.com>
>---
> arch/powerpc/dts/p1020-post.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
>diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-
>post.dtsi
>index 1e5e678..fb3b203 100644
>--- a/arch/powerpc/dts/p1020-post.dtsi
>+++ b/arch/powerpc/dts/p1020-post.dtsi
>@@ -24,6 +24,13 @@
> single-cpu-affinity;
> last-interrupt-source = <255>;
> };
>+
>+ esdhc: esdhc@2e000 {
>+ compatible = "fsl,esdhc";
>+ reg = <0x2e000 0x1000>;
>+ /* Filled in by U-Boot */
>+ clock-frequency = <0>;
>+ };
> };
>
> /* PCIe controller base address 0x9000 */
>--
>2.9.5
Series applied to mpc85xx master after rebased to top of tree, awaiting
upstream.
Thanks
priyankajain
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