> -----Original Message-----
> From: Marek Vasut <ma...@denx.de>
> Sent: Thursday, November 21, 2019 5:37 AM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut <ma...@denx.de>; See, Chin Liang
> <chin.liang....@intel.com>; Dalon Westergreen <dwest...@gmail.com>;
> Dinh Nguyen <dingu...@kernel.org>; Tan, Ley Foon
> <ley.foon....@intel.com>; Simon Goldschmidt
> <simon.k.r.goldschm...@gmail.com>; Chee, Tien Fong
> <tien.fong.c...@intel.com>
> Subject: [PATCH] ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target
> 
> The NAND devices with 128 kiB erase blocks require extra 64 kiB padding
> between each SPL image. Generate U-Boot image with such a padding using
> this new target.
> 
> Signed-off-by: Marek Vasut <ma...@denx.de>
> Cc: Chin Liang See <chin.liang....@intel.com>
> Cc: Dalon Westergreen <dwest...@gmail.com>
> Cc: Dinh Nguyen <dingu...@kernel.org>
> Cc: Ley Foon Tan <ley.foon....@intel.com>
> Cc: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com>
> Cc: Tien Fong Chee <tien.fong.c...@intel.com>

Reviewed-by: Ley Foon Tan <ley.foon....@intel.com>

Regards
Ley Foon
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