On 2019/11/17 上午3:32, Vasily Khoruzhick wrote:
That's not correct and it breaks SMBUS-style reads and and writes for
some chips (e.g. SYR82X/SYR83X).
Stop bit should be sent only after the last message.
Signed-off-by: Vasily Khoruzhick <anars...@gmail.com>
Reviewed-by: Kever Yang <kever.y...@rock-chips.com>
Thanks,
- Kever
---
drivers/i2c/rk_i2c.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index cdd94bb05a..32b2ee8578 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -253,7 +253,6 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint
reg, uint r_len,
}
i2c_exit:
- rk_i2c_send_stop_bit(i2c);
rk_i2c_disable(i2c);
return err;
@@ -332,7 +331,6 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip,
uint reg, uint r_len,
}
i2c_exit:
- rk_i2c_send_stop_bit(i2c);
rk_i2c_disable(i2c);
return err;
@@ -360,6 +358,9 @@ static int rockchip_i2c_xfer(struct udevice *bus, struct
i2c_msg *msg,
}
}
+ rk_i2c_send_stop_bit(i2c);
+ rk_i2c_disable(i2c);
+
return 0;
}
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