Reinhard Meyer (-VC) schrieb:
> Hello,
>
> apparently none of the mainstream u-boot designs use
> SDCard/MMC.
>
> It appears that this task should not be a huge problem,
> the MCI for both AVR32 and AT91SAM9 seems to be identical
> (and MCI on AVR32 works).
>
> But before I perhaps reinvent anything already done, I
> prefer to ask here. Also any input what obstacles have
> been found would be appreciated.
>
> I need the support for 9260/9G20/9XE.
>
After some hacking I get the following results:
TOP9000> mmc init
mmc: bus_hz is 99328000, setting clock 150000 Hz, block size 512
mmc: requested clock 150000 is too low; setting CLKDIV to 255; resulting clock
is 194000
mmc: CMD0 0x0 (flags 0x0)
mmc: status 0x0000c0e5
mmc: CMD0 0x0 (flags 0x100)
mmc: status 0x0000c0e5
mmc: CMD55 0x0 (flags 0x1040)
mmc: status 0x0000c0e5
mmc: response: 00000120
mmc: CMD41 0x100000 (flags 0x41)
mmc: status 0x0004c0e5
mmc: response: 00ff8000
mmc: CMD55 0x0 (flags 0x1040)
mmc: status 0x0000c0e5
mmc: response: 00000120
mmc: CMD41 0x100000 (flags 0x41)
mmc: status 0x0004c0e5
mmc: response: 80ff8000
mmc: CMD2 0x0 (flags 0x80)
mmc: status 0x0000c0e5
mmc: response: 19445953 4d495344 10000073 f30054bb
Manufacturer ID: 19
OEM/Application ID: 4459
Product name: SMISD
Product Revision: 1.0
Product Serial Number: 29683
Manufacturing Date: 05/04
mmc: CMD3 0x0 (flags 0x1040)
mmc: status 0x0000c0e5
mmc: response: b3680500
SD Card detected (RCA 45928)
mmc: CMD9 0xb3680000 (flags 0x1080)
mmc: status 0x0000c0e5
mmc: response: 005e0032 1f5983d0 6db7bf9f 96400005
CSD data: 005e0032 1f5983d0 6db7bf9f 96400005
CSD structure version: 1.2
MMC System Spec version: 12
Card command classes: 3d0
Read block length: 256
Supports partial reads
Write block length: 1
Does not support partial writes
Does not support group WP
Card capacity: 131072000 bytes
File format: 1/2
Write protection: permanent
mmc: Using 983040 cycles data timeout (DTOR=0x6f)
Card does not support 512 byte reads, aborting.
No MMC card found
It IS a 1 GB Card, and sure has 512 Byte sectors
(it worked well on the ATNGW100)
with the same driver source.
What I notice is that the current driver (atmel_mci.c)
nowhere sets the MMCI_SDCR register, therefore using
the bus in 1 bit mode. But that is the case in the AVR32
case as well, and there MCI did work...
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