On 10/5/19 12:30 AM, Dalon Westergreen wrote:
> From: Dalon Westergreen <dalon.westergr...@intel.com>
>
> Generic handoff devicetree include uses a header generated by
> the qts-filter-a10.sh script in mach-socfpga. The script
> creates the header based on design specific implementations
> for clock and pinmux configurations.
[...]
> diff --git a/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi
> b/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi
[...]
> - clock_manager@0xffd04000 {
> + clkmgr@0xffd04000 {
> + compatible = "altr,socfpga-a10-clk-init";
> + reg = <0xffd04000 0x00000200>;
> + reg-names = "soc_clock_manager_OCP_SLV";
> u-boot,dm-pre-reloc;
>
> mainpll {
> + vco0-psrc = <MAINPLLGRP_VCO0_PSRC>;
> + vco1-denom = <MAINPLLGRP_VCO1_DENOM>;
> + vco1-numer = <MAINPLLGRP_VCO1_NUMER>;
But these bits are board-specific , they shouldn't be in common DT.
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