The tests rely on a dummy driver to allocate and initialize the regmap
and the regmap fields using the managed API.
The first test checks that the read/write callbacks are used.
The second test checks if regmap fields behave properly (mask and shift
are ok) by peeking into the regmap.
Signed-off-by: Jean-Jacques Hiblot <jjhib...@ti.com>
---
arch/sandbox/dts/test.dts | 13 +++
test/dm/regmap.c | 189 ++++++++++++++++++++++++++++++++++++++
2 files changed, 202 insertions(+)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 27b0baab27..044895586a 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -862,6 +862,19 @@
mdio: mdio-test {
compatible = "sandbox,mdio";
};
+
+ some_regmapped-bus {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ ranges = <0x0 0x0 0x10>;
+ compatible = "simple-bus";
+
+ regmap-test_0 {
+ reg = <0 0x10>;
+ compatible = "sandbox,regmap_test";
+ };
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/test/dm/regmap.c b/test/dm/regmap.c
index 82de295cb8..29159ccf41 100644
--- a/test/dm/regmap.c
+++ b/test/dm/regmap.c
@@ -171,3 +171,192 @@ static int dm_test_regmap_poll(struct unit_test_state
*uts)
}
DM_TEST(dm_test_regmap_poll, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+struct regmaptest_priv {
+ struct regmap *regmap;
+ struct regmap_field **fields;
+};
+
+#define REGMAP_TEST_BUF_SZ 12
+struct regmaptest_context {
+ unsigned short buffer[REGMAP_TEST_BUF_SZ];
+} ctx;
+
+static int regmaptest_write(void *context, unsigned int reg, unsigned int val)
+{
+ struct regmaptest_context *ctx = context;
+
+ if (reg < ARRAY_SIZE(ctx->buffer)) {
+ ctx->buffer[reg] = val;
+ return 0;
+ }
+ return -ERANGE;
+}
+
+static int regmaptest_read(void *context, unsigned int reg, unsigned int *val)
+{
+ struct regmaptest_context *ctx = context;
+
+ if (reg < ARRAY_SIZE(ctx->buffer)) {
+ *val = ctx->buffer[reg];
+ return 0;
+ }
+
+ return -ERANGE;
+}
+
+static struct regmap_config cfg = {
+ .reg_write = regmaptest_write,
+ .reg_read = regmaptest_read,
+};
+
+static const struct reg_field field_cfgs[] = {
+ {
+ .reg = 0,
+ .lsb = 0,
+ .msb = 6,
+ },
+ {
+ .reg = 1,
+ .lsb = 4,
+ .msb = 12,
+ },
+ {
+ .reg = 1,
+ .lsb = 12,
+ .msb = 15,
+ }
+};
+
+static int remaptest_probe(struct udevice *dev)
+{
+ struct regmaptest_priv *priv = dev_get_priv(dev);
+ struct regmap *regmap;
+ struct regmap_field *field;
+ int i;
+ static const int n = ARRAY_SIZE(field_cfgs);
+
+ regmap = devm_regmap_init(dev, NULL, &ctx, &cfg);
+ if (IS_ERR(regmap))
+ return PTR_ERR(regmap);
+ priv->regmap = regmap;
+
+ priv->fields = devm_kzalloc(dev, sizeof(struct regmap_field *) * n,
+ GFP_KERNEL);
+ if (!priv->fields)
+ return -ENOMEM;
+
+ for (i = 0 ; i < n; i++) {
+ field = devm_regmap_field_alloc(dev, regmap, field_cfgs[i]);
+ if (IS_ERR(field))
+ return PTR_ERR(field);
+ priv->fields[i] = field;
+ }
+ return 0;
+}
+
+static const struct udevice_id regmaptest_ids[] = {
+ { .compatible = "sandbox,regmap_test" },
+ { }
+};
+
+U_BOOT_DRIVER(regmap_test) = {
+ .name = "regmaptest_drv",
+ .of_match = regmaptest_ids,
+ .id = UCLASS_NOP,
+ .probe = remaptest_probe,
+ .priv_auto_alloc_size = sizeof(struct regmaptest_priv),
+};
+
+static int dm_test_devm_regmap(struct unit_test_state *uts)
+{
+ int i = 0;
+ u32 val;
+ u16 pattern[REGMAP_TEST_BUF_SZ];
+ struct udevice *dev;
+ struct regmaptest_priv *priv;
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_NOP, "regmap-test_0",
+ &dev));
+
+ priv = dev_get_priv(dev);
+
+ srand(get_ticks() + rand());
+ for (i = REGMAP_TEST_BUF_SZ - 1; i >= 0; i--) {
+ pattern[i] = rand() & 0xFFFF;
+ ut_assertok(regmap_write(priv->regmap, i, pattern[i]));
+ }
+ for (i = 0; i < REGMAP_TEST_BUF_SZ; i++) {
+ ut_assertok(regmap_read(priv->regmap, i, &val));
+ ut_asserteq(val, ctx.buffer[i]);
+ ut_asserteq(val, pattern[i]);
+ }
+
+ ut_asserteq(-ERANGE, regmap_write(priv->regmap, REGMAP_TEST_BUF_SZ,
+ val));
+ ut_asserteq(-ERANGE, regmap_read(priv->regmap, REGMAP_TEST_BUF_SZ,
+ &val));
+ ut_asserteq(-ERANGE, regmap_write(priv->regmap, -1, val));
+ ut_asserteq(-ERANGE, regmap_read(priv->regmap, -1, &val));
+
+ return 0;
+}
+DM_TEST(dm_test_devm_regmap, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+static int test_one_field(struct unit_test_state *uts,
+ struct regmap *regmap,
+ struct regmap_field *field,
+ struct reg_field field_cfg)
+{
+ int j;
+ unsigned int val;
+ int mask = (1 << (field_cfg.msb - field_cfg.lsb + 1)) - 1;
+ int shift = field_cfg.lsb;
+
+ ut_assertok(regmap_write(regmap, field_cfg.reg, 0));
+ ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
+ ut_asserteq(0, val);
+
+ for (j = 0; j <= mask; j++) {
+ ut_assertok(regmap_field_write(field, j));
+ ut_assertok(regmap_field_read(field, &val));
+ ut_asserteq(j, val);
+ ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
+ ut_asserteq(j << shift, val);
+ }
+
+ ut_assertok(regmap_field_write(field, mask + 1));
+ ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
+ ut_asserteq(0, val);
+
+ ut_assertok(regmap_field_write(field, 0xFFFF));
+ ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
+ ut_asserteq(mask << shift, val);
+
+ ut_assertok(regmap_write(regmap, field_cfg.reg, 0xFFFF));
+ ut_assertok(regmap_field_write(field, 0));
+ ut_assertok(regmap_read(regmap, field_cfg.reg, &val));
+ ut_asserteq(0xFFFF & ~(mask << shift), val);
+ return 0;
+}
+
+static int dm_test_devm_regmap_field(struct unit_test_state *uts)
+{
+ int i, rc;
+ struct udevice *dev;
+ struct regmaptest_priv *priv;
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_NOP, "regmap-test_0",
+ &dev));
+ priv = dev_get_priv(dev);
+
+ for (i = 0 ; i < ARRAY_SIZE(field_cfgs); i++) {
+ rc = test_one_field(uts, priv->regmap, priv->fields[i],
+ field_cfgs[i]);
+ if (rc)
+ break;
+ }
+
+ return 0;
+}
+DM_TEST(dm_test_devm_regmap_field, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
--
2.17.1
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