With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init
happens in TPL. Enable this, using a variable to try to make the
conditions more palatable.

Signed-off-by: Simon Glass <s...@chromium.org>
---

 arch/x86/lib/init_helpers.c | 22 +++++++++++++++-------
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index 4774a9bdb78..3e3a11ac2fa 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -12,15 +12,23 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int init_cache_f_r(void)
 {
-#if CONFIG_IS_ENABLED(X86_32BIT_INIT) && !defined(CONFIG_HAVE_FSP) && \
-               !defined(CONFIG_SYS_SLIMBOOTLOADER)
+       bool do_mtrr = CONFIG_IS_ENABLED(X86_32BIT_INIT) ||
+                IS_ENABLED(CONFIG_FSP_VERSION2);
        int ret;
 
-       ret = mtrr_commit(false);
-       /* If MTRR MSR is not implemented by the processor, just ignore it */
-       if (ret && ret != -ENOSYS)
-               return ret;
-#endif
+       do_mtrr &= !IS_ENABLED(CONFIG_FSP_VERSION1) &&
+               !IS_ENABLED(CONFIG_SYS_SLIMBOOTLOADER);
+
+       if (do_mtrr) {
+               ret = mtrr_commit(false);
+               /*
+                * If MTRR MSR is not implemented by the processor, just ignore
+                * it
+                */
+               if (ret && ret != -ENOSYS)
+                       return ret;
+       }
+
        /* Initialise the CPU cache(s) */
        return init_cache();
 }
-- 
2.23.0.444.g18eeb5a265-goog

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