Modern Intel CPUs use a standard bus clock value of 100MHz, so put this in
a common file and tidy up the copies.

Signed-off-by: Simon Glass <s...@chromium.org>
---

 arch/x86/cpu/broadwell/cpu.c                      | 2 +-
 arch/x86/cpu/broadwell/cpu_full.c                 | 4 ++--
 arch/x86/cpu/ivybridge/model_206ax.c              | 4 ++--
 arch/x86/include/asm/arch-broadwell/cpu.h         | 3 ---
 arch/x86/include/asm/arch-broadwell/pch.h         | 3 ---
 arch/x86/include/asm/arch-ivybridge/model_206ax.h | 3 ---
 arch/x86/include/asm/cpu_common.h                 | 5 +++++
 7 files changed, 10 insertions(+), 14 deletions(-)

diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index 61003a6d68f..586a2e8f05a 100644
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -60,7 +60,7 @@ void set_max_freq(void)
        msr_write(MSR_IA32_PERF_CTL, perf_ctl);
 
        debug("CPU: frequency set to %d MHz\n",
-             ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK);
+             ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ);
 }
 
 int arch_cpu_init(void)
diff --git a/arch/x86/cpu/broadwell/cpu_full.c 
b/arch/x86/cpu/broadwell/cpu_full.c
index d1f3c07109f..58cc2f362cc 100644
--- a/arch/x86/cpu/broadwell/cpu_full.c
+++ b/arch/x86/cpu/broadwell/cpu_full.c
@@ -360,7 +360,7 @@ static void set_max_ratio(void)
        msr_write(MSR_IA32_PERF_CTL, perf_ctl);
 
        debug("cpu: frequency set to %d\n",
-             ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK);
+             ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ);
 }
 
 int broadwell_init(struct udevice *dev)
@@ -634,7 +634,7 @@ void cpu_set_power_limits(int power_limit_1_time)
 
 static int broadwell_get_info(struct udevice *dev, struct cpu_info *info)
 {
-       return cpu_intel_get_info(info, BROADWELL_BCLK);
+       return cpu_intel_get_info(info, INTEL_BCLK_MHZ);
 }
 
 static int broadwell_get_count(struct udevice *dev)
diff --git a/arch/x86/cpu/ivybridge/model_206ax.c 
b/arch/x86/cpu/ivybridge/model_206ax.c
index ed66d2dd8d7..3177ba3297f 100644
--- a/arch/x86/cpu/ivybridge/model_206ax.c
+++ b/arch/x86/cpu/ivybridge/model_206ax.c
@@ -346,7 +346,7 @@ static void set_max_ratio(void)
        msr_write(MSR_IA32_PERF_CTL, perf_ctl);
 
        debug("model_x06ax: frequency set to %d\n",
-             ((perf_ctl.lo >> 8) & 0xff) * SANDYBRIDGE_BCLK);
+             ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ);
 }
 
 static void set_energy_perf_bias(u8 policy)
@@ -418,7 +418,7 @@ static int model_206ax_init(struct udevice *dev)
 
 static int model_206ax_get_info(struct udevice *dev, struct cpu_info *info)
 {
-       return cpu_intel_get_info(info, SANDYBRIDGE_BCLK);
+       return cpu_intel_get_info(info, INTEL_BCLK_MHZ);
 
        return 0;
 }
diff --git a/arch/x86/include/asm/arch-broadwell/cpu.h 
b/arch/x86/include/asm/arch-broadwell/cpu.h
index ca22a799968..3bc3bd6609e 100644
--- a/arch/x86/include/asm/arch-broadwell/cpu.h
+++ b/arch/x86/include/asm/arch-broadwell/cpu.h
@@ -21,9 +21,6 @@
 #define CPUID_BROADWELL_D0     0x306d3
 #define CPUID_BROADWELL_E0     0x306d4
 
-/* Broadwell bus clock is fixed at 100MHz */
-#define BROADWELL_BCLK         100
-
 #define BROADWELL_FAMILY_ULT   0x306d0
 
 #define CORE_THREAD_COUNT_MSR          0x35
diff --git a/arch/x86/include/asm/arch-broadwell/pch.h 
b/arch/x86/include/asm/arch-broadwell/pch.h
index 23153a040fa..ecdf6d16f94 100644
--- a/arch/x86/include/asm/arch-broadwell/pch.h
+++ b/arch/x86/include/asm/arch-broadwell/pch.h
@@ -6,9 +6,6 @@
 #ifndef __ASM_ARCH_PCH_H
 #define __ASM_ARCH_PCH_H
 
-/* CPU bus clock is fixed at 100MHz */
-#define CPU_BCLK               100
-
 #define PMBASE                 0x40
 #define ACPI_CNTL              0x44
 #define  ACPI_EN               (1 << 7)
diff --git a/arch/x86/include/asm/arch-ivybridge/model_206ax.h 
b/arch/x86/include/asm/arch-ivybridge/model_206ax.h
index 850d96bdd9a..10caaa24226 100644
--- a/arch/x86/include/asm/arch-ivybridge/model_206ax.h
+++ b/arch/x86/include/asm/arch-ivybridge/model_206ax.h
@@ -8,9 +8,6 @@
 #ifndef _ASM_ARCH_MODEL_206AX_H
 #define _ASM_ARCH_MODEL_206AX_H
 
-/* SandyBridge/IvyBridge bus clock is fixed at 100MHz */
-#define SANDYBRIDGE_BCLK               100
-
 #define  CPUID_VMX                     (1 << 5)
 #define  CPUID_SMX                     (1 << 6)
 #define MSR_FEATURE_CONFIG             0x13c
diff --git a/arch/x86/include/asm/cpu_common.h 
b/arch/x86/include/asm/cpu_common.h
index a1fd7498741..3d093021ae6 100644
--- a/arch/x86/include/asm/cpu_common.h
+++ b/arch/x86/include/asm/cpu_common.h
@@ -6,6 +6,11 @@
 #ifndef __ASM_CPU_COMMON_H
 #define __ASM_CPU_COMMON_H
 
+/* Standard Intel bus clock is fixed at 100MHz */
+enum {
+       INTEL_BCLK_MHZ          = 100
+};
+
 struct cpu_info;
 
 /**
-- 
2.23.0.444.g18eeb5a265-goog

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