At present these functions are stubbed out. For more comprehensive testing
with PCI devices it is useful to be able to fully emulate I/O access. Add
simple implementations for these.
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/sandbox/cpu/cpu.c | 51 ++++++++++++++++++++++++++++++++
arch/sandbox/include/asm/io.h | 27 +++++++++++------
arch/sandbox/include/asm/state.h | 1 +
drivers/nvme/nvme.h | 4 +--
4 files changed, 72 insertions(+), 11 deletions(-)
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index fdfb209f77d..f3af88d79e9 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -225,6 +225,57 @@ phys_addr_t map_to_sysmem(const void *ptr)
return mentry->tag;
}
+unsigned int sandbox_read(const void *addr, enum sandboxio_size_t size)
+{
+ struct sandbox_state *state = state_get_current();
+
+ if (!state->allow_memio)
+ return 0;
+
+ switch (size) {
+ case SB_SIZE_8:
+ return *(u8 *)addr;
+ case SB_SIZE_16:
+ return *(u16 *)addr;
+ case SB_SIZE_32:
+ return *(u32 *)addr;
+ case SB_SIZE_64:
+ return *(u64 *)addr;
+ }
+
+ return 0;
+}
+
+void sandbox_write(void *addr, unsigned int val, enum sandboxio_size_t size)
+{
+ struct sandbox_state *state = state_get_current();
+
+ if (!state->allow_memio)
+ return;
+
+ switch (size) {
+ case SB_SIZE_8:
+ *(u8 *)addr = val;
+ break;
+ case SB_SIZE_16:
+ *(u16 *)addr = val;
+ break;
+ case SB_SIZE_32:
+ *(u32 *)addr = val;
+ break;
+ case SB_SIZE_64:
+ *(u64 *)addr = val;
+ break;
+ }
+}
+
+void sandbox_set_enable_memio(bool enable)
+{
+ struct sandbox_state *state = state_get_current();
+
+ state->allow_memio = enable;
+}
+
void sandbox_set_enable_pci_map(int enable)
{
enable_pci_map = enable;
diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
index 481787b516b..2bbaff26a61 100644
--- a/arch/sandbox/include/asm/io.h
+++ b/arch/sandbox/include/asm/io.h
@@ -6,6 +6,13 @@
#ifndef __SANDBOX_ASM_IO_H
#define __SANDBOX_ASM_IO_H
+enum sandboxio_size_t {
+ SB_SIZE_8,
+ SB_SIZE_16,
+ SB_SIZE_32,
+ SB_SIZE_64,
+};
+
void *phys_to_virt(phys_addr_t paddr);
#define phys_to_virt phys_to_virt
@@ -38,18 +45,20 @@ static inline void unmap_sysmem(const void *vaddr)
/* Map from a pointer to our RAM buffer */
phys_addr_t map_to_sysmem(const void *ptr);
-/* Define nops for sandbox I/O access */
-#define readb(addr) ((void)addr, 0)
-#define readw(addr) ((void)addr, 0)
-#define readl(addr) ((void)addr, 0)
+unsigned int sandbox_read(const void *addr, enum sandboxio_size_t size);
+void sandbox_write(void *addr, unsigned int val, enum sandboxio_size_t size);
+
+#define readb(addr) sandbox_read(addr, SB_SIZE_8)
+#define readw(addr) sandbox_read(addr, SB_SIZE_16)
+#define readl(addr) sandbox_read(addr, SB_SIZE_32)
#ifdef CONFIG_SANDBOX64
-#define readq(addr) ((void)addr, 0)
+#define readq(addr) sandbox_read(addr, SB_SIZE_64)
#endif
-#define writeb(v, addr) ((void)addr)
-#define writew(v, addr) ((void)addr)
-#define writel(v, addr) ((void)addr)
+#define writeb(v, addr) sandbox_write(addr, v, SB_SIZE_8)
+#define writew(v, addr) sandbox_write(addr, v, SB_SIZE_16)
+#define writel(v, addr) sandbox_write(addr, v, SB_SIZE_32)
#ifdef CONFIG_SANDBOX64
-#define writeq(v, addr) ((void)addr)
+#define writeq(v, addr) sandbox_write(addr, v, SB_SIZE_64)
#endif
/*
diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h
index 2d773d3fa6b..ad3e94beb9a 100644
--- a/arch/sandbox/include/asm/state.h
+++ b/arch/sandbox/include/asm/state.h
@@ -102,6 +102,7 @@ struct sandbox_state {
ulong next_tag; /* Next address tag to allocate */
struct list_head mapmem_head; /* struct sandbox_mapmem_entry */
bool hwspinlock; /* Hardware Spinlock status */
+ bool allow_memio; /* Allow readl() etc. to work */
/*
* This struct is getting large.
diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h
index 922f7abfe85..c56ea7e58e6 100644
--- a/drivers/nvme/nvme.h
+++ b/drivers/nvme/nvme.h
@@ -536,7 +536,7 @@ struct nvme_completion {
static inline u64 nvme_readq(__le64 volatile *regs)
{
#if BITS_PER_LONG == 64
- return readq(regs);
+ return readq((__le64 *)regs);
#else
__u32 *ptr = (__u32 *)regs;
u64 val_lo = readl(ptr);
@@ -549,7 +549,7 @@ static inline u64 nvme_readq(__le64 volatile *regs)
static inline void nvme_writeq(const u64 val, __le64 volatile *regs)
{
#if BITS_PER_LONG == 64
- writeq(val, regs);
+ writeq(val, (__le64 *)regs);
#else
__u32 *ptr = (__u32 *)regs;
u32 val_lo = lower_32_bits(val);
--
2.23.0.444.g18eeb5a265-goog
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