> -----Original Message----- > From: Wolfgang Denk [mailto:w...@denx.de] > Sent: Tuesday, June 22, 2010 11:31 AM > To: Aggrwal Poonam-B10812 > Cc: u-boot@lists.denx.de > Subject: Re: [U-Boot] [PATCH] 85xx/p1_p2_rdb: Added RevD board support. > > Dear Poonam Aggrwal, > > In message <1277185601-4939-1-git-send-email- > poonam.aggr...@freescale.com> you wrote: > > Signed-off-by: Dipen Dudhat <dipen.dud...@freescale.com> > > Signed-off-by: Poonam Aggrwal <poonam.aggr...@freescale.com> > > --- > > board/freescale/p1_p2_rdb/p1_p2_rdb.c | 25 ++++++++----------------- > > 1 files changed, 8 insertions(+), 17 deletions(-) > > > > diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c > > b/board/freescale/p1_p2_rdb/p1_p2_rdb.c > > index 31cdf9a..d870a3b 100644 > > --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c > > +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c > > @@ -52,32 +52,23 @@ DECLARE_GLOBAL_DATA_PTR; > > > > #define SYSCLK_MASK 0x00200000 > > #define BOARDREV_MASK 0x10100000 > > -#define BOARDREV_B 0x10100000 > > #define BOARDREV_C 0x00100000 > > +#define BOARDREV_D 0x00000000 > > > > #define SYSCLK_66 66666666 > > -#define SYSCLK_50 50000000 > > #define SYSCLK_100 100000000 > > Does that mean thea board rev. B and 50 MHz sys clk are not longer > supported? Have these configurations been used in the past?Then we should > rather keep them? Okay, will add them. > > > unsigned long get_board_sys_clk(ulong dummy) { > > volatile ccsr_gpio_t *pgpio = (void > > *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); > > Please use I/O accessors to read from peripherals! > > I will redo the patch and resend. > Best regards, > > Wolfgang Denk > > -- > DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "I > find this a nice feature but it is not according to the documen- > tation. Or is it a BUG?" "Let's call it an accidental feature. :-)" > - Larry Wall in <6...@jpl-devvax.jpl.nasa.gov>
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