Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it.
Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- include/configs/rk3128_common.h | 2 ++ include/configs/rk3188_common.h | 1 + include/configs/rk322x_common.h | 1 + include/configs/rk3288_common.h | 2 ++ include/configs/rk3328_common.h | 2 ++ include/configs/rk3368_common.h | 2 ++ include/configs/rk3399_common.h | 2 ++ include/configs/rv1108_common.h | 2 ++ 8 files changed, 14 insertions(+) diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 20d62439fb..d12696d6b3 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -19,6 +19,8 @@ #define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 +#define CONFIG_IRAM_BASE 0x10080000 + #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index ec90088309..92524b06ad 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -23,6 +23,7 @@ #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800) #define CONFIG_ROCKCHIP_CHIP_TAG "RK31" +#define CONFIG_IRAM_BASE 0x10080000 /* spl size 32kb sram - 2kb bootrom */ #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800) diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index cc08699944..9582cdfb64 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -24,6 +24,7 @@ #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK32" +#define CONFIG_IRAM_BASE 0x10080000 #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (512UL << 20UL) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 5472a90633..7c7d9f8fb8 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -25,6 +25,8 @@ #define CONFIG_SYS_LOAD_ADDR 0x00800800 #define CONFIG_SPL_STACK 0xff718000 +#define CONFIG_IRAM_BASE 0xff700000 + /* RAW SD card / eMMC locations. */ #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 3a8e37ef98..1cf45bbb3e 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -8,6 +8,8 @@ #include "rockchip-common.h" +#define CONFIG_IRAM_BASE 0xff090000 + #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 1a859a7e43..340413dbba 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -23,6 +23,8 @@ #define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020 #define COUNTER_FREQUENCY 24000000 +#define CONFIG_IRAM_BASE 0xff8c0000 + #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00280000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 63eac19a4e..12ad60d443 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -15,6 +15,8 @@ #define COUNTER_FREQUENCY 24000000 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff8680a0 +#define CONFIG_IRAM_BASE 0xff8c0000 + #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00800800 diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 6f61f01538..691aa51e98 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -8,6 +8,8 @@ #include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h" +#define CONFIG_IRAM_BASE 0x10080000 + #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT -- 2.17.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
