Now, we have spi_write_then_read routine that would handle
spi_xfer handling based on the tx_buf and rx_buf parameters.
So, replace individual flash read/write/cmd transfer call
with spi_write_then_read.
Cc: Egnite GmbH <i...@egnite.de>
Cc: Daniel Gorsulowski <daniel.gorsulow...@esd.eu>
Cc: Ilko Iliev <il...@ronetix.at>
Cc: Marek Vasut <ma...@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikow...@gmail.com>
Cc: Alison Wang <alison.w...@nxp.com>
Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
---
drivers/mtd/spi/sf_dataflash.c | 22 +++++++++++++---------
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c
index b6a2631747..55fb4bd31a 100644
--- a/drivers/mtd/spi/sf_dataflash.c
+++ b/drivers/mtd/spi/sf_dataflash.c
@@ -76,12 +76,14 @@ struct dataflash {
static inline int dataflash_status(struct spi_slave *spi)
{
int ret;
+ u8 opcode = OP_READ_STATUS;
u8 status;
+
/*
* NOTE: at45db321c over 25 MHz wants to write
* a dummy byte after the opcode...
*/
- ret = spi_flash_cmd(spi, OP_READ_STATUS, &status, 1);
+ ret = spi_write_then_read(spi, &opcode, 1, NULL, &status, 1);
return ret ? -EIO : status;
}
@@ -173,7 +175,7 @@ static int spi_dataflash_erase(struct udevice *dev, u32
offset, size_t len)
command[0], command[1], command[2], command[3],
pageaddr);
- status = spi_flash_cmd_write(spi, command, 4, NULL, 0);
+ status = spi_write_then_read(spi, command, 4, NULL, NULL, 0);
if (status < 0) {
debug("%s: erase send command error!\n", dev->name);
return -EIO;
@@ -248,7 +250,7 @@ static int spi_dataflash_read(struct udevice *dev, u32
offset, size_t len,
command[3] = (uint8_t)(addr >> 0);
/* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */
- status = spi_flash_cmd_read(spi, command, 8, buf, len);
+ status = spi_write_then_read(spi, command, 8, NULL, buf, len);
spi_release_bus(spi);
@@ -327,7 +329,8 @@ int spi_dataflash_write(struct udevice *dev, u32 offset,
size_t len,
debug("TRANSFER: (%x) %x %x %x\n",
command[0], command[1], command[2], command[3]);
- status = spi_flash_cmd_write(spi, command, 4, NULL, 0);
+ status = spi_write_then_read(spi, command, 4,
+ NULL, NULL, 0);
if (status < 0) {
debug("%s: write(<pagesize) command error!\n",
dev->name);
@@ -352,8 +355,8 @@ int spi_dataflash_write(struct udevice *dev, u32 offset,
size_t len,
debug("PROGRAM: (%x) %x %x %x\n",
command[0], command[1], command[2], command[3]);
- status = spi_flash_cmd_write(spi, command,
- 4, writebuf, writelen);
+ status = spi_write_then_read(spi, command, 4,
+ writebuf, NULL, writelen);
if (status < 0) {
debug("%s: write send command error!\n", dev->name);
return -EIO;
@@ -376,8 +379,8 @@ int spi_dataflash_write(struct udevice *dev, u32 offset,
size_t len,
debug("COMPARE: (%x) %x %x %x\n",
command[0], command[1], command[2], command[3]);
- status = spi_flash_cmd_write(spi, command,
- 4, writebuf, writelen);
+ status = spi_write_then_read(spi, command, 4,
+ writebuf, NULL, writelen);
if (status < 0) {
debug("%s: write(compare) send command error!\n",
dev->name);
@@ -508,6 +511,7 @@ static struct data_flash_info *jedec_probe(struct spi_slave
*spi)
uint8_t id[5];
uint32_t jedec;
struct data_flash_info *info;
+ u8 opcode = CMD_READ_ID;
int status;
/*
@@ -519,7 +523,7 @@ static struct data_flash_info *jedec_probe(struct spi_slave
*spi)
* That's not an error; only rev C and newer chips handle it, and
* only Atmel sells these chips.
*/
- tmp = spi_flash_cmd(spi, CMD_READ_ID, id, sizeof(id));
+ tmp = spi_write_then_read(spi, &opcode, 1, NULL, id, sizeof(id));
if (tmp < 0) {
printf("dataflash: error %d reading JEDEC ID\n", tmp);
return ERR_PTR(tmp);
--
2.18.0.321.gffc6fa0e3
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