Add nds32 based board adp-ag101 support.

Signed-off-by: Macpaul Lin <[email protected]>
---
 board/AndesTech/adp-ag101/Makefile    |   60 ++++++++++++++
 board/AndesTech/adp-ag101/adp-ag101.c |  144 +++++++++++++++++++++++++++++++++
 board/AndesTech/adp-ag101/config.mk   |   46 +++++++++++
 3 files changed, 250 insertions(+), 0 deletions(-)
 create mode 100644 board/AndesTech/adp-ag101/Makefile
 create mode 100644 board/AndesTech/adp-ag101/adp-ag101.c
 create mode 100644 board/AndesTech/adp-ag101/config.mk

diff --git a/board/AndesTech/adp-ag101/Makefile 
b/board/AndesTech/adp-ag101/Makefile
new file mode 100644
index 0000000..53d8592
--- /dev/null
+++ b/board/AndesTech/adp-ag101/Makefile
@@ -0,0 +1,60 @@
+#
+# (C) Copyright 2002
+# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+# Marius Groeger <[email protected]>
+#
+# Copyright (C) 2006 Andes Technology Corporation
+# Shawn Lin, Andes Tech Crop. <[email protected]>
+# Macpaul Lin, Andes Technology Corporation <[email protected]>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB    = $(obj)lib$(BOARD).a
+
+OBJS-y += adp-ag101.o ../common/serial.o ../common/flib_serial.o \
+       ../common/flash.o ../common/flib_flash.o ../common/env.o
+OBJS-$(CONFIG_DRIVER_FTMAC100) += ../common/ftmac100.o
+OBJS-$(CONFIG_DRIVER_FTPCI100) += ../common/ftpci100.o
+OBJS-$(CONFIG_DRIVER_FOTG2xx) += ../common/fotg2xx.o
+
+SOBJS  :=
+OBJS   := $(OBJS-y)
+
+all:   $(LIB)
+
+$(LIB):        $(OBJS) $(SOBJS)
+       $(AR) crv $@ $^
+
+clean:
+       rm -f $(SOBJS) $(OBJS)
+
+distclean:     clean
+       rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/AndesTech/adp-ag101/adp-ag101.c 
b/board/AndesTech/adp-ag101/adp-ag101.c
new file mode 100644
index 0000000..8e56999
--- /dev/null
+++ b/board/AndesTech/adp-ag101/adp-ag101.c
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ *
+ * Copyright (C) 2006 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <[email protected]>
+ * Macpaul Lin, Andes Technology Corporation <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/andesboot.h>
+//#include <porting.h>
+#include "../include/porting.h"
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int board_init(bd_t *bd)
+{
+#ifdef not_complete_yet
+       /* Activate LED flasher */
+       IO_LEDFLSH = 0x40;
+#endif /* end_of_not */
+
+       /* arch number MACH_TYPE_EDB7312 */
+       bd->bi_arch_number = 91;
+
+       /* location of boot parameters */
+       bd->bi_boot_params = 0x400;
+
+       return 1;
+}
+
+/*
+ *     bank_num ==> setting the config of which bank (0, 1st, 2nd, ..)
+ *     data_width ==> the width of the SDRAM module on the bank
+ *     sdram_size ==> the size of each module
+ *     bus_width ==> the width of data bus
+ *     bank_size ==> the total memory size of the bank (should be equal as 
"sdram_size * how many modules")
+ */
+#define SDRAM_MODULE_WIDTH_4                   0
+#define SDRAM_MODULE_WIDTH_8                   (1<<12)
+#define SDRAM_MODULE_WIDTH_16                  (2<<12)
+#define SDRAM_MODULE_WIDTH_32                  (3<<12)
+
+
+// 16M bit, 64M bit,...
+#define SDRAM_MODULE_SIZE_16M                  0
+#define SDRAM_MODULE_SIZE_64M                  (1<<8)
+#define SDRAM_MODULE_SIZE_128M                 (2<<8)
+#define SDRAM_MODULE_SIZE_256M                 (3<<8)
+
+#define SDRAM_BUS_WIDTH_8                      0
+#define SDRAM_BUS_WIDTH_16                     (1<<4)
+#define SDRAM_BUS_WIDTH_32                     (2<<4)
+
+// 1M byte, 2M byte,...
+#define SDRAM_BANK_SIZE_1M                     0
+#define SDRAM_BANK_SIZE_2M                     1
+#define SDRAM_BANK_SIZE_4M                     2
+#define SDRAM_BANK_SIZE_8M                     3
+#define SDRAM_BANK_SIZE_16M                    4
+#define SDRAM_BANK_SIZE_32M                    5
+#define SDRAM_BANK_SIZE_64M                    6
+#define SDRAM_BANK_SIZE_128M                   7
+#define SDRAM_BANK_SIZE_256M                   8
+
+
+#define NDS32_COMMON_BANK_REG_BASE                     0x0c
+
+void sdram_config(int bank_num, u32 bank_base, int data_width, int sdram_size, 
int bus_width, int bank_size)
+{
+       u32 config_reg_val;
+
+       config_reg_val = (1UL<<28) | (bank_base>>4)&0x0fff0000 | data_width | 
sdram_size | bus_width | bank_size;
+
+       cpe_outl( NDS32_COMMON_SDRAMC_BASE + NDS32_COMMON_BANK_REG_BASE + 
bank_num*4, config_reg_val);
+}
+
+int dram_init(bd_t *bd)
+{
+#ifdef not_complete_yet
+       // initialize the base address of SDRAM
+       sdram_config( 0, 0x0,           SDRAM_MODULE_WIDTH_8, 
SDRAM_MODULE_SIZE_64M, SDRAM_BUS_WIDTH_32, SDRAM_BANK_SIZE_32M);
+       sdram_config( 1, 0x02000000,    SDRAM_MODULE_WIDTH_8, 
SDRAM_MODULE_SIZE_64M, SDRAM_BUS_WIDTH_32, SDRAM_BANK_SIZE_32M);
+       sdram_config( 2, 0x04000000,    SDRAM_MODULE_WIDTH_8, 
SDRAM_MODULE_SIZE_64M, SDRAM_BUS_WIDTH_32, SDRAM_BANK_SIZE_32M);
+       sdram_config( 3, 0x06000000,    SDRAM_MODULE_WIDTH_8, 
SDRAM_MODULE_SIZE_64M, SDRAM_BUS_WIDTH_32, SDRAM_BANK_SIZE_32M);
+#endif /* end_of_not */
+
+       int i;
+       u32 config_reg_ptr;
+       u32 config_reg_val;
+       u32 phys_sdram_size = 0;
+
+       /* for convinence, we assume there is only one bank in total.
+        * (boot_ini will put all sdram at the continues address with the 
beginning is 0)
+        */
+       for (i=0; i<8; ++i)
+       {
+               config_reg_ptr = NDS32_COMMON_SDRAMC_BASE + 
NDS32_COMMON_BANK_REG_BASE + i*4;
+               config_reg_val = cpe_inl(config_reg_ptr);
+
+               if ( (config_reg_val & 0x10000000) == 0)
+               {
+                       continue;
+               }
+
+               switch (config_reg_val & 0x0f)
+               {
+                       case SDRAM_BANK_SIZE_1M:        phys_sdram_size += 
0x100000;            break;
+                       case SDRAM_BANK_SIZE_2M:        phys_sdram_size += 
0x200000;            break;
+                       case SDRAM_BANK_SIZE_4M:        phys_sdram_size += 
0x400000;            break;
+                       case SDRAM_BANK_SIZE_8M:        phys_sdram_size += 
0x800000;            break;
+                       case SDRAM_BANK_SIZE_16M:       phys_sdram_size += 
0x1000000;           break;
+                       case SDRAM_BANK_SIZE_32M:       phys_sdram_size += 
0x2000000;           break;
+                       case SDRAM_BANK_SIZE_64M:       phys_sdram_size += 
0x4000000;           break;
+                       case SDRAM_BANK_SIZE_128M:      phys_sdram_size += 
0x8000000;           break;
+                       case SDRAM_BANK_SIZE_256M:      phys_sdram_size += 
0x10000000;          break;
+               }
+       }
+       bd->bi_dram[0].start = PHYS_SDRAM_0;
+       bd->bi_dram[0].size  = phys_sdram_size;
+
+       return phys_sdram_size;
+}
diff --git a/board/AndesTech/adp-ag101/config.mk 
b/board/AndesTech/adp-ag101/config.mk
new file mode 100644
index 0000000..16bf578
--- /dev/null
+++ b/board/AndesTech/adp-ag101/config.mk
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <[email protected]>
+# David Mueller, ELSOFT AG, <[email protected]>
+#
+# SAMSUNG SMDK2410 board with S3C2410X (ARM920T) cpu
+#
+# see http://www.samsung.com/ for more information on SAMSUNG
+#
+# Copyright (C) 2006 Andes Technology Corporation
+# Shawn Lin, Andes Technology Corporation <[email protected]>
+# Macpaul Lin, Andes Technology Corporation <[email protected]>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+
+# SMDK2410 has 1 bank of 32 MB DRAM
+#
+# 3000'0000 to 3200'0000
+#
+# Linux-Kernel is expected to be at 3000'0000, entry 3000'0000
+# optionally with a ramdisk at 3080'0000
+#
+# we load ourself to 31F0'0000
+#
+# download areas is 3100'0000
+
+PLATFORM_RELFLAGS += -gdwarf-2
+TEXT_BASE = 0x03200000
+LDSCRIPT := $(SRCTREE)/arch/$(ARCH)/cpu/$(CPU)/u-boot.lds
+EXTERN_LIB += $(shell $(CC) -print-file-name=include)/../static/el/libgcc.a
-- 
1.7.1

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