> Subject: [PATCH 3/4] mx6: clock: Introduce disable_ipu_clock()
>
> Introduce disable_ipu_clock(). This is done in preparation for configuring the
> NoC registers on i.MX6QP in SPL.
>
> Afer the NoC registers are set the IPU clocks can be disabled.
>
> Signed-off-by: Fabio Estevam <feste...@gmail.com>
> ---
> arch/arm/include/asm/arch-mx6/clock.h | 1 +
> arch/arm/mach-imx/mx6/clock.c | 12 ++++++++++++
> 2 files changed, 13 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-mx6/clock.h
> b/arch/arm/include/asm/arch-mx6/clock.h
> index a9481a5fea..f7760541a4 100644
> --- a/arch/arm/include/asm/arch-mx6/clock.h
> +++ b/arch/arm/include/asm/arch-mx6/clock.h
> @@ -71,6 +71,7 @@ int enable_pcie_clock(void); int
> enable_i2c_clk(unsigned char enable, unsigned i2c_num); int
> enable_spi_clk(unsigned char enable, unsigned spi_num); void
> enable_ipu_clock(void);
> +void disable_ipu_clock(void);
> int enable_fec_anatop_clock(int fec_id, enum enet_freq freq); void
> enable_enet_clk(unsigned char enable); int enable_lcdif_clock(u32
> base_addr, bool enable); diff --git a/arch/arm/mach-imx/mx6/clock.c
> b/arch/arm/mach-imx/mx6/clock.c index 9951f79106..e1e21e37a8 100644
> --- a/arch/arm/mach-imx/mx6/clock.c
> +++ b/arch/arm/mach-imx/mx6/clock.c
> @@ -1287,6 +1287,18 @@ void enable_ipu_clock(void)
> setbits_le32(&mxc_ccm->CCGR3,
> MXC_CCM_CCGR3_IPU2_IPU_MASK);
> }
> }
> +
> +void disable_ipu_clock(void)
> +{
> + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg
> *)CCM_BASE_ADDR;
> +
> + clrbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_IPU1_IPU_MASK);
> +
> + if (is_mx6dqp()) {
> + clrbits_le32(&mxc_ccm->CCGR6,
> MXC_CCM_CCGR6_PRG_CLK0_MASK);
> + clrbits_le32(&mxc_ccm->CCGR3,
> MXC_CCM_CCGR3_IPU2_IPU_MASK);
> + }
> +}
> #endif
Reviewed-by: Peng Fan <peng....@nxp.com>
>
> #ifndef CONFIG_SPL_BUILD
> --
> 2.17.1
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
