On Tue, Jul 9, 2019 at 5:34 PM Andes <ub...@andestech.com> wrote: > > From: Rick Chen <r...@andestech.com> > > When L2 node exists inside cpus node, uclass_get_device > can not parse L2 node successfully. So move it outside > from cpus node. > > Also add tag-ram-ctl and data-ram-ctl attributes for > v5l2 cache controller driver. This can adjust timing > by requirement from dtb to improve performance. > > Signed-off-by: Rick Chen <r...@andestech.com> > Cc: Greentime Hu <greent...@andestech.com> > Cc: KC Lin <kc...@andestech.com> > --- > arch/riscv/dts/ae350_32.dts | 17 +++++++++++------ > arch/riscv/dts/ae350_64.dts | 17 +++++++++++------ > 2 files changed, 22 insertions(+), 12 deletions(-) >
Reviewed-by: Bin Meng <bmeng...@gmail.com> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
