> -----Original Message----- > From: Yinbo Zhu <yinbo....@nxp.com> > Sent: Thursday, May 23, 2019 8:36 AM > To: York Sun <york....@nxp.com>; u-boot@lists.denx.de; Prabhakar Kushwaha > <prabhakar.kushw...@nxp.com>; Vabhav Sharma <vabhav.sha...@nxp.com> > Cc: Yinbo Zhu <yinbo....@nxp.com>; Xiaobo Xie <xiaobo....@nxp.com>; Jiafei > Pan <jiafei....@nxp.com>; Y.b. Lu <yangbo...@nxp.com>; Jagdish Gediya > <jagdish.ged...@nxp.com>; Andy Tang <andy.t...@nxp.com>; G.h. Gao > <guanhua....@nxp.com> > Subject: [PATCH v5 1/2] armv8: fsl-lsch3: add clock support for the second > eSDHC > > From: Yangbo Lu <yangbo...@nxp.com> > > Layerscape began to use two eSDHC controllers, for example, LS1028A. They > are same IP block with same reference clock. > This patch is to add clock support for the second eSDHC. > > Signed-off-by: Yangbo Lu <yangbo...@nxp.com> > Signed-off-by: Yinbo Zhu <yinbo....@nxp.com> > --- > Change in v2: > Change in v3: > Remove non-TFA patch > Change in v4: > update the Copyright information > Change in v5: > Add NXP Copyright information > >
Fixed copyright issue. This patch has been applied to fsl-qoriq master, awaiting upstream. --pk _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot