Hi Luca,

On 12. 06. 19 13:32, Michal Simek wrote:
> On 11. 06. 19 18:39, Luca Ceresoli wrote:
>> Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the
>> only publicly-available compatible carrier card. The SoM is based on the EV
>> version of the Xilinx ZynqMP SoC+FPGA.
>>
>> The psu_init_gpl.c file has been generated from the board definition files
>> at [0] using Vivado 2018.3 and then minimized by
>> tools/zynqmp_psu_init_minimize.sh. Manually removed serdes init code since
>> it is not mentioned in device tree and fixed a checkpatch error.
>>
>> [0] 
>> https://github.com/Avnet/bdf/tree/3686c9ff7d2f0467fb4fcf39f861b8d6ff183b12/ultrazed_7ev_cc/1.1
>>
>> Signed-off-by: Luca Ceresoli <l...@lucaceresoli.net>
>>
>> ---
>>
>> Changes v2 -> v3 (Michal):
>> - add board version to DT file names (v1 for both SoM and carrier)
>> - DT: add model and compatible properties to both SoM and CC
>> - DT: remove port-number property from uart0
>> - DT: fix compatible string for eeprom
>> - DT: fix ethernet phy nodes
>> - psu_init: replace "return (0)" -> "return 0"
>>
>> Changes v1 -> v2:
>>  - remove serdes code from psu_init_gpl.c since no serdes is enabled in DT
>>    (Michal)
>>  - split DT in two files: SOM and carrier card (Michal)
>>  - improved DT comments, added product URLs
>>  - DT: add missing phy-handle under ethernet node (Michal)
>>
>> Whole patchset tested on:
>>  - current u-boot/master, as is
>>  - current u-boot-microblaze/master
>> ---
>>  arch/arm/dts/Makefile                         |   1 +
>>  ...ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts |  60 ++
>>  arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi   |  56 ++
>>  .../psu_init_gpl.c                            | 663 ++++++++++++++++++
>>  ...edev_cc_v1_0_ultrazedev_som_v1_0_defconfig |  64 ++
>>  5 files changed, 844 insertions(+)
>>  create mode 100644 
>> arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts
>>  create mode 100644 arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi
>>  create mode 100644 
>> board/xilinx/zynqmp/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0/psu_init_gpl.c
>>  create mode 100644 
>> configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
>>
>> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
>> index e0c54bfa767e..a6764ba53581 100644
>> --- a/arch/arm/dts/Makefile
>> +++ b/arch/arm/dts/Makefile
>> @@ -238,6 +238,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>>      zynq-zybo-z7.dtb
>>  dtb-$(CONFIG_ARCH_ZYNQMP) += \
>>      avnet-ultra96-rev1.dtb                  \
>> +    avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dtb        \
>>      zynqmp-mini.dtb                         \
>>      zynqmp-mini-emmc0.dtb                   \
>>      zynqmp-mini-emmc1.dtb                   \
>> diff --git a/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts 
>> b/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts
>> new file mode 100644
>> index 000000000000..9a05a9f7c37c
>> --- /dev/null
>> +++ b/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts
>> @@ -0,0 +1,60 @@
>> +// SPDX-License-Identifier: GPL-2.0+ OR X11
>> +
>> +/*
>> + * UltraZed-EV Carrier Card v1 (based on the UltraZed-EV SoM)
>> + * http://ultrazed.org/product/ultrazed-ev-carrier-card
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "avnet-ultrazedev-som-v1.0.dtsi"
>> +
>> +/ {
>> +    model = "Avnet UltraZed EV Carrier Card v1.0";
>> +    compatible = "avnet,ultrazedev-cc-v1.0-ultrazedev-som-v1.0",
>> +                 "xlnx,zynqmp";
>> +    chosen {
>> +            stdout-path = "serial0:115200n8";
>> +            xlnx,eeprom = &eeprom;
>> +    };
>> +    aliases {
>> +            ethernet0 = &gem3;
>> +            serial0 = &uart0;
>> +    };
>> +};
>> +
>> +&uart0 {
>> +    device_type = "serial";
>> +    status = "okay";
>> +    u-boot,dm-pre-reloc;
> 
> I have removed this line and applied this patch.

Can you please also send a patch to create maintainer fragment for this
board?

[u-boot](sdhci2)$ ./tools/genboardscfg.py -f
WARNING: no status info for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
WARNING: no maintainers for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'

Please put it to board/xilinx/zynqmp/MAINTAINERS

Thanks,
Michal
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