Makes dm_pci_map_bar function available for integrated PCI devices that
support Enhanced Allocation instead of original PCI BAR mechanism.

Signed-off-by: Alex Marginean <alexm.ossl...@gmail.com>
---
 drivers/pci/pci-uclass.c | 47 ++++++++++++++++++++++++++++++++++++++++
 include/pci.h            |  2 +-
 2 files changed, 48 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index cf1e7617ae..3204f156c3 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1341,11 +1341,58 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, 
phys_addr_t phys_addr,
        return bus_addr;
 }
 
+static void *dm_pci_map_ea_bar(struct udevice *dev, int bar, int flags)
+{
+       int ea_off, ea_cnt, i, entry_size = 0;
+       int bar_id = bar - PCI_BASE_ADDRESS_0;
+       u32 ea_entry;
+       u64 addr;
+
+       /* handle PCI functions that use Enhanced Allocation */
+       ea_off = dm_pci_find_capability(dev, PCI_CAP_ID_EA);
+
+       if (!ea_off)
+               return 0;
+
+       /* EA capability structure header */
+       dm_pci_read_config32(dev, ea_off, &ea_entry);
+       ea_cnt = (ea_entry >> 16) & 0x3f;
+       ea_off += 4;
+
+       for (i = 0; i < ea_cnt; i++, ea_off +=  entry_size) {
+               /* Entry header */
+               dm_pci_read_config32(dev, ea_off, &ea_entry);
+               entry_size = (ea_entry & 0x7) * 4;
+
+               if (((ea_entry >> 4) & 0xf) != bar_id)
+                       continue;
+
+               /* Base address, 1st DW */
+               dm_pci_read_config32(dev, ea_off + 4, &ea_entry);
+               addr = ea_entry & ~0x3;
+               if (ea_entry & 0x2) {
+                       dm_pci_read_config32(dev, ea_off + 12, &ea_entry);
+                       addr |= (u64)ea_entry << 32;
+               }
+
+               /* size ignored for now */
+               return map_physmem(addr, flags, 0);
+       }
+       return 0;
+}
+
 void *dm_pci_map_bar(struct udevice *dev, int bar, int flags)
 {
        pci_addr_t pci_bus_addr;
        u32 bar_response;
 
+       /*
+        * if the function supports Enhanced Allocation use that instead of
+        * BARs
+        */
+       if (dm_pci_find_capability(dev, PCI_CAP_ID_EA))
+               return dm_pci_map_ea_bar(dev, bar, flags);
+
        /* read BAR address */
        dm_pci_read_config32(dev, bar, &bar_response);
        pci_bus_addr = (pci_addr_t)(bar_response & ~0xf);
diff --git a/include/pci.h b/include/pci.h
index 508f7bca81..e1528bb257 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -1314,7 +1314,7 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, 
phys_addr_t addr,
  * @dev:       Device to check
  * @bar:       Bar number to read (numbered from 0)
  * @flags:     Flags for the region type (PCI_REGION_...)
- * @return: pointer to the virtual address to use
+ * @return: pointer to the virtual address to use or 0 on error
  */
 void *dm_pci_map_bar(struct udevice *dev, int bar, int flags);
 
-- 
2.17.1

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